ImageHD: 通过超维度计算实现高效的设备端视觉表示持续学习
ImageHD: Energy-Efficient On-Device Continual Learning of Visual Representations via Hyperdimensional Computing
AI总结：
ImageHD基于超维度计算实现设备端视觉持续学习，通过硬件感知的持续学习方法和量化CNN前端，在严格时延和芯片内存限制下提升效率与能效。
摘要：
在设备端持续学习（CL）对于边缘AI系统处理非平稳数据流至关重要，但现有方法大多依赖反向传播或样本密集的分类器，导致计算、内存和延迟开销巨大。超维度计算（HDC）提供了一种轻量级替代方案，通过快速、非迭代的在线更新。结合紧凑的卷积神经网络（CNN）特征提取器，HDC使设备端适应变得高效且具有强大的视觉表示。然而，先前基于HDC的持续学习系统通常依赖多层内存层次结构和复杂的集群管理，限制了在资源受限硬件上的部署。我们提出了ImageHD，一种基于HDC的设备端视觉数据持续学习FPGA加速器。ImageHD针对严格时延和芯片内存限制下的流式持续学习，避免了昂贵的迭代优化。在算法层面，我们引入了一种硬件感知的持续学习方法，通过统一的样本内存限制类别样本，并采用硬件高效的集群合并策略，同时结合量化CNN前端以减少部署开销而不牺牲准确性。在系统层面，ImageHD被实现为在AMD Zynq ZCU104 FPGA上的流式数据流架构，整合HDC编码、相似性搜索和受限集群管理，利用字打包二进制超向量进行大规模并行位计算，以在紧致的芯片资源预算内运行。在CORe50上，ImageHD相比优化的CPU（GPU）基线分别实现了高达40.4x（4.84x）的速度提升和383x（105.1x）的能效提升，展示了HDC赋能的持续学习在实时边缘AI中的实用性。
英文摘要：
On-device continual learning (CL) is critical for edge AI systems operating on non-stationary data streams, but most existing methods rely on backpropagation or exemplar-heavy classifiers, incurring substantial compute, memory, and latency overheads. Hyperdimensional computing (HDC) offers a lightweight alternative through fast, non-iterative online updates. Combined with a compact convolutional neural network (CNN) feature extractor, HDC enables efficient on-device adaptation with strong visual representations. However, prior HDC-based CL systems often depend on multi-tier memory hierarchies and complex cluster management, limiting deployability on resource-constrained hardware. We present ImageHD, an FPGA accelerator for on-device continual learning of visual data based on HDC. ImageHD targets streaming CL under strict latency and on-chip memory constraints, avoiding costly iterative optimization. At the algorithmic level, we introduce a hardware-aware CL method that bounds class exemplars through a unified exemplar memory and a hardware-efficient cluster merging strategy, while incorporating a quantized CNN front-end to reduce deployment overhead without sacrificing accuracy. At the system level, ImageHD is implemented as a streaming dataflow architecture on the AMD Zynq ZCU104 FPGA, integrating HDC encoding, similarity search, and bounded cluster management using word-packed binary hypervectors for massively parallel bitwise computation within tight on-chip resource budgets. On CORe50, ImageHD achieves up to 40.4x (4.84x) speedup and 383x (105.1x) energy efficiency over optimized CPU (GPU) baselines, demonstrating the practicality of HDC-enabled continual learning for real-time edge AI.
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
