ORAP：为行锤击缓解内存优化的行访问预取
ORAP: Optimized Row Access Prefetching for Rowhammer-mitigated Memory
AI总结：
ORAP通过优化行访问预取减少DRAM激活率，提升性能并降低能耗。
摘要：
行锤击是一种已研究的DRAM现象，其中对给定行的多次激活可能导致相邻行的位翻转。许多缓解技术已被提出以应对行锤击，其中一些支持已被纳入JEDEC DDR5标准中的每行激活计数器（PRAC）和刷新管理（RFM）系统。基于这些机制的缓解方案声称具有不同程度的面积、功率和性能开销。迄今为止，现有缓解方案的评估通常忽略了其他内存系统组件如硬件预取器的影响。几乎所有的现代系统都集成了硬件预取，并且这些预取器可以通过推测缓存填充显著提高处理器性能。这些预取器会引发更多的下游内存请求并增加DRAM激活率。行锤击缓解的性能开销直接与内存访问模式相关，使硬件预取器和行锤击缓解都面临交叉交互。我们发现，先前工作的硬件预取器提供的性能改进往往受到行锤击缓解的严重影响。实际上，推测内存引用从预取中获得的许多好处在于加速和重新排序DRAM引用的方式，从而触发缓解措施，显著减少预取的好处。本文提出了优化的行访问预取器（ORAP），利用最后一级缓存（LLC）空间来缓存大量DRAM行缓冲区内容，以减少未来激活的需要。与最先进的Berti预取器合作，ORAP在RFM缓解的内存系统中将DRAM激活率降低了51.3%，并在Berti和SPP-PPF的预取配置下实现了4.6%的速度提升。在PRAC缓解下，ORAP将能耗开销降低了11.8%。
英文摘要：
Rowhammer is a well-studied DRAM phenomenon wherein multiple activations to a given row can cause bit flips in adjacent rows. Many mitigation techniques have been introduced to address Rowhammer, with some support being incorporated into the JEDEC DDR5 standard for per-row-activation-counter (PRAC) and refresh-management (RFM) systems. Mitigation schemes built on these mechanisms claim to have various levels of area, power, and performance overheads. To date the evaluation of existing mitigation schemes typically neglects the impact of other memory system components such as hardware prefetchers. Nearly all modern systems incorporate hardware prefetching and these can significantly improve processor performance through speculative cache population. These prefetchers induce higher numbers of downstream memory requests and increase DRAM activation rates. The performance overhead of Rowhammer mitigations are tied directly to memory access patterns, exposing both hardware prefetchers and Rowhammer mitigations to cross-interaction. We find that the performance improvement provided by prior-work hardware prefetchers is often severely impacted by Rowhammer mitigations. In effect, much of the benefit of speculative memory references from prefetching lies in accelerating and reordering DRAM references in ways that trigger mitigations, significantly reducing the benefits of prefetching. This work proposes the Optimized Row Access Prefetcher (ORAP), leveraging last-level-cache (LLC) space to cache large portions of DRAM rowbuffer contents to reduce the need for future activations. Working with the state-of-the-art Berti prefetcher, ORAP reduces DRAM activation rates by 51.3% and achieves a 4.6% speedup over the prefetcher configuration of Berti and SPP-PPF when prefetching in an RFM-mitigated memory system. Under PRAC mitigations, ORAP reduces energy overheads by 11.8%.
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