MING：一种自动化的CNN到边缘MLIR HLS框架
MING: An Automated CNN-to-Edge MLIR HLS framework
AI总结：
MING框架通过基于MLIR的自动化设计流程，实现CNN内核在边缘设备上的高效低功耗部署，提升处理速度15至200倍。
摘要：
随着对低延迟和实时处理需求的增加，机器学习应用正逐步向边缘计算平台迁移，在这些平台上，由于与CPU和GPU相比更具能效，现场可编程门阵列（FPGA）被广泛采用。为了生成高性能且低功耗的FPGA设计，已经提出了几种基于高层次综合（HLS）供应商工具的框架，其中基于MLIR的框架由于其可扩展性和易用性而受到广泛关注。然而，现有最先进的框架往往忽视了边缘设备的严格资源限制。为了解决这一限制，我们提出了MING，一种基于多级中间表示（MLIR）的框架，它抽象并自动化了HLS设计过程。在该框架中，我们采用流架构，并精心管理缓冲区，专门设计以在确保低延迟的同时处理资源限制。与最近的框架相比，我们的方法在标准卷积神经网络（CNN）内核上平均实现了15倍的速度提升，最多四层，以及单层内核的200倍。对于输入尺寸较大的内核，MING能够生成高效的设计，符合硬件资源限制，而最先进的框架则难以达到。
英文摘要：
Driven by the increasing demand for low-latency and real-time processing, machine learning applications are steadily migrating toward edge computing platforms, where Field-Programmable Gate Arrays (FPGAs) are widely adopted for their energy efficiency compared to CPUs and GPUs. To generate high-performance and low-power FPGA designs, several frameworks built upon High Level Synthesis (HLS) vendor tools have been proposed, among which MLIR-based frameworks are gaining significant traction due to their extensibility and ease of use. However, existing state-of-the-art frameworks often overlook the stringent resource constraints of edge devices. To address this limitation, we propose MING, an Multi-Level Intermediate Representation (MLIR)-based framework that abstracts and automates the HLS design process. Within this framework, we adopt a streaming architecture with carefully managed buffers, specifically designed to handle resource constraints while ensuring low-latency. In comparison with recent frameworks, our approach achieves on average 15x speedup for standard Convolutional Neural Network (CNN) kernels with up to four layers, and up to 200x for single-layer kernels. For kernels with larger input sizes, MING is capable of generating efficient designs that respect hardware resource constraints, whereas state-of-the-art frameworks struggle to meet.
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
