六倍余量：面向边缘RSU通信的GPU加速5G LDPC解码特性分析
Six Times to Spare: Characterizing GPU-Accelerated 5G LDPC Decoding for Edge-RSU Communications
AI总结：
针对边缘RSU中5G LDPC解码的延迟敏感问题，本文通过Sionna LDPC5G基准测试，量化GPU卸载在紧凑异构边缘平台上提供的计算余量，证明GPU加速可显著提高吞吐量并释放CPU压力。
摘要：
超可靠低延迟车载通信（URLLC）需要在网络边缘提供足够的物理层（PHY）计算余量，其中路边单元（RSU）和紧凑型下一代基站（gNB）必须在满足严格时序约束的同时，共同承载更高层服务。在5G新无线电（5G NR）中，低密度奇偶校验码（LDPC）解码是一种对延迟敏感的迭代PHY工作负载，其成本随工作负载并行度和解码器迭代预算而扩展，使其成为通用中央处理器（CPU）上的潜在瓶颈。本文提出了一个可复现、基于遥测的微基准测试，该测试源自Sionna LDPC5G基线，用于表征通过图形处理器（GPU）卸载在紧凑异构边缘平台上获得的计算余量。我们评估了多种处理器架构以及广泛的批大小和迭代次数下的解码器行为，重点关注与边缘配置相关的密集运行状态。结果表明，GPU加速显著提高了LDPC吞吐量，减少了摊销解码服务时间，并将计算压力从CPU转移，从而提高了在重并行工作负载下满足边缘RSU时序预算的可行性。这些发现表明，GPU卸载可以为紧凑型车载边缘平台提供大量的备用PHY计算余量，使得密集解码工作负载在现实边缘功耗和时序约束下更加实用。
英文摘要：
Ultra-reliable low-latency vehicular communications (URLLC) require sufficient physical-layer (PHY) compute headroom at the network edge, where roadside units (RSUs) and compact next-generation base stations (gNBs) must meet strict timing constraints while co-hosting higher-layer services. In 5G New Radio (5G NR), low-density parity-check code (LDPC) decoding is a latency-sensitive iterative PHY workload whose cost scales with both workload parallelism and decoder iteration budget, making it a potential bottleneck on general-purpose central processing units (CPUs). This paper presents a reproducible, telemetry-backed microbenchmark derived from the Sionna LDPC5G baseline to characterize the compute headroom obtained through graphics processing unit (GPU) offload on compact heterogeneous edge platforms. We evaluate decoder behavior across multiple processor architectures and a wide range of batch sizes and iteration counts, with emphasis on dense operating regimes relevant to edge provisioning. Results show that GPU acceleration substantially increases LDPC throughput, reduces amortized decode service time, and shifts compute pressure away from the CPU, thereby improving the feasibility of meeting edge-RSU timing budgets under heavy parallel workloads. These findings indicate that GPU offload can provide substantial spare PHY compute margin for compact vehicular edge platforms, making dense decode workloads more practical within realistic edge power and timing constraints.
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
