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可扩展的生成游戏引擎:通过硬件-算法协同设计突破分辨率限制

Scalable Generative Game Engine: Breaking the Resolution Wall via Hardware-Algorithm Co-Design

School of Microelectronics, Southern University of Science and Technology (SUSTech)(南方科技大学电子学院);Institute of Automation, Chinese Academy of Sciences (CASIA)(中国科学院自动化研究所);University of Waterloo(滑铁卢大学);School of Marxism, Tsinghua University(清华大学马克思主义学院);Zhongguancun Academy(中关村学院)

Wei Zeng, Xuchen Li, Ruili Feng, Zhen Liu, Fengwei An, Jian Zhao

AI总结:

本文提出硬件-算法协同设计框架,通过优化资源分配和减少内存带宽使用,实现高分辨率实时生成游戏,提升像素吞吐量50倍,达到26.4 FPS和48.3 FPS的流畅性能。

摘要:

实时生成游戏引擎代表了交互模拟领域的一次范式转变,有望用神经世界模型取代传统图形管线。然而,现有方法从根本上受到``内存瓶颈''的限制,使实际部署只能在低分辨率(例如64×64)下进行。本文通过引入一个可扩展的``硬件-算法协同设计''框架,弥合了生成模型与高分辨率神经模拟之间的差距。我们发现,高分辨率生成面临关键的资源不匹配问题:世界模型是计算瓶颈,而解码器是内存瓶颈。为解决这一问题,我们提出了一种异构架构,智能地在一组AI加速器集群上解耦这些组件。我们的系统有三个核心创新:(1)一种不对称的资源分配策略,优化吞吐量以满足序列并行性约束;(2)一种以内存为中心的操作融合方案,最小化离芯片带宽使用;(3)一种感知流形的潜在外推机制,利用时间冗余性来掩盖延迟。我们在一组可编程AI加速器集群上验证了我们的方法,实现了720×480分辨率下的实时生成——比先前基线提高了50倍的像素吞吐量。在连续3D赛车和离散2D平台游戏基准测试中,我们的系统分别实现了流畅的26.4 FPS和48.3 FPS,平均有效延迟为2.7 ms。这项工作表明,通过架构协同设计解决``内存瓶颈''不仅是优化,更是实现高保真、响应神经游戏的前提。

英文摘要:

Real-time generative game engines represent a paradigm shift in interactive simulation, promising to replace traditional graphics pipelines with neural world models. However, existing approaches are fundamentally constrained by the ``Memory Wall,'' restricting practical deployments to low resolutions (e.g., $64 \times 64$). This paper bridges the gap between generative models and high-resolution neural simulations by introducing a scalable \textit{Hardware-Algorithm Co-Design} framework. We identify that high-resolution generation suffers from a critical resource mismatch: the World Model is compute-bound while the Decoder is memory-bound. To address this, we propose a heterogeneous architecture that intelligently decouples these components across a cluster of AI accelerators. Our system features three core innovations: (1) an asymmetric resource allocation strategy that optimizes throughput under sequence parallelism constraints; (2) a memory-centric operator fusion scheme that minimizes off-chip bandwidth usage; and (3) a manifold-aware latent extrapolation mechanism that exploits temporal redundancy to mask latency. We validate our approach on a cluster of programmable AI accelerators, enabling real-time generation at $720 \times 480$ resolution -- a $50\times$ increase in pixel throughput over prior baselines. Evaluated on both continuous 3D racing and discrete 2D platformer benchmarks, our system delivers fluid 26.4 FPS and 48.3 FPS respectively, with an amortized effective latency of 2.7 ms. This work demonstrates that resolving the ``Memory Wall'' via architectural co-design is not merely an optimization, but a prerequisite for enabling high-fidelity, responsive neural gameplay.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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