CircuitLM: 一种基于多智能体的大语言模型辅助设计框架，用于从自然语言提示生成电路原理图
CircuitLM: A Multi-Agent LLM-Aided Design Framework for Generating Circuit Schematics from Natural Language Prompts
AI总结：
提出CircuitLM多智能体流水线，通过嵌入驱动的组件知识库和五阶段流程，将自然语言提示转化为结构化的CircuitJSON原理图，并采用确定性电气规则检查和LLM作为评判的元评估器双重验证，解决大语言模型在电路设计中的幻觉和物理约束问题。
摘要：
从高层自然语言描述生成准确的电路原理图仍然是电子设计自动化（EDA）中的一个持久挑战，因为大语言模型（LLM）经常产生组件幻觉、违反严格的物理约束并输出非机器可读的结果。为解决此问题，我们提出CircuitLM，一个多智能体流水线，将用户提示转化为结构化的、视觉可解释的$\texttt{CircuitJSON}$原理图。该框架通过五个顺序阶段： (i) 组件识别，(ii) 规范引脚输出检索，(iii) 思维链推理，(iv) JSON原理图合成，以及(v) 交互式力导向可视化，基于一个精心策划的、嵌入驱动的组件知识库进行生成，从而减轻幻觉并确保物理可行性。我们在一个包含100个独特电路设计提示的数据集上，使用五个最先进的大语言模型评估了该系统。为系统评估性能，我们部署了严格的双层评估方法：一个确定性电气规则检查（ERC）引擎按严格严重性（关键、主要、次要、警告）对拓扑故障进行分类，同时一个LLM作为评判的元评估器识别复杂的、上下文感知的设计缺陷，这些缺陷绕过了标准的基于规则的检查器。最终，这项工作展示了目标检索与确定性和语义验证相结合如何将自然语言转化为结构可行的、原理图就绪的硬件和安全电路原型。我们的代码和数据公开在 https://github.com/Khandakar227/CircuitLM。
英文摘要：
Generating accurate circuit schematics from high-level natural language descriptions remains a persistent challenge in electronic design automation (EDA), as large language models (LLMs) frequently hallucinate components, violate strict physical constraints, and produce non-machine-readable outputs. To address this, we present CircuitLM, a multi-agent pipeline that translates user prompts into structured, visually interpretable $\texttt{CircuitJSON}$ schematics. The framework mitigates hallucination and ensures physical viability by grounding generation in a curated, embedding-powered component knowledge base through five sequential stages: (i) component identification, (ii) canonical pinout retrieval, (iii) chain-of-thought reasoning, (iv) JSON schematic synthesis, and (v) interactive force-directed visualization. We evaluate the system on a dataset of 100 unique circuit-design prompts using five state-of-the-art LLMs. To systematically assess performance, we deploy a rigorous dual-layered evaluation methodology: a deterministic Electrical Rule Checking (ERC) engine categorizes topological faults by strict severity (Critical, Major, Minor, Warning), while an LLM-as-a-judge meta-evaluator identifies complex, context-aware design flaws that bypass standard rule-based checkers. Ultimately, this work demonstrates how targeted retrieval combined with deterministic and semantic verification can bridge natural language to structurally viable, schematic-ready hardware and safe circuit prototyping. Our code and data are publicly available at https://github.com/Khandakar227/CircuitLM.
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
