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arXiv 2510.03250cs.LGcs.PF
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轻量可微逻辑门网络

Light Differentiable Logic Gate Networks

ETH Zürich(苏黎世联邦理工学院)

Lukas Rüttgers, Till Aczel, Andreas Plesner, Roger Wattenhofer

AI总结:

针对可微逻辑门网络存在的梯度消失、离散化误差、训练成本高且深度增加会损害精度的问题,提出对数级缩减参数的重参数化方法,实现模型更小、训练更快且精度稳定甚至更优。

摘要:

可微逻辑门网络(DLGNs)在推理时表现出极高效率,同时维持着具有竞争力的精度。但梯度消失、离散化误差和高昂训练成本阻碍了这类网络的扩展。即便后续研究提出了专门的参数初始化方案,增加网络深度仍会损害精度。我们发现这些问题的根源在于逻辑门神经元自身的底层参数化方式。为解决该问题,我们提出一种重新参数化方法,该方法还能使参数规模随每个门的输入数量呈对数级缩减。对于二值输入,这已能将模型尺寸缩小4倍,反向传播速度最高提升1.86倍,且训练步数减少8.5倍即可收敛。除此之外,我们表明其在CIFAR-100上的精度保持稳定,有时甚至优于原始参数化方法。

英文摘要:

Differentiable logic gate networks (DLGNs) exhibit extraordinary efficiency at inference while sustaining competitive accuracy. But vanishing gradients, discretization errors, and high training cost impede scaling these networks. Even with dedicated parameter initialization schemes from subsequent works, increasing depth still harms accuracy. We show that the root cause of these issues lies in the underlying parametrization of logic gate neurons themselves. To overcome this issue, we propose a reparametrization that also shrinks the parameter size logarithmically in the number of inputs per gate. For binary inputs, this already reduces the model size by 4x, speeds up the backward pass by up to 1.86x, and converges in 8.5x fewer training steps. On top of that, we show that the accuracy on CIFAR-100 remains stable and sometimes superior to the original parametrization.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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