ELF：通过在重构中剪枝冗余实现高效逻辑综合
ELF: Efficient Logic Synthesis by Pruning Redundancy in Refactoring
AI总结：
针对逻辑优化算子计算成本高的问题，提出利用分类器预先剪枝不成功的割以消除不必要的重新综合操作，在EPFL基准和工业设计上实现3.9倍平均加速。
摘要：
在电子设计自动化中，逻辑优化算子在最小化逻辑电路的门数方面起着至关重要的作用。然而，它们的计算需求很高。诸如 refactor 之类的算子通常为每个节点形成迭代割，力求获得更紧凑的表示——这一任务平均有 98% 会失败。先前的研究试图通过并行化来降低计算成本。相比之下，我们的方法利用分类器抢先剪枝不成功的割，从而消除不必要的重新综合操作。在使用 EPFL 基准套件和 10 个大型工业设计上对 refactor 算子进行的实验表明，与最先进的 ABC 实现相比，该技术可将逻辑优化平均加速 3.9 倍。
英文摘要：
In electronic design automation, logic optimization operators play a crucial role in minimizing the gate count of logic circuits. However, their computation demands are high. Operators such as refactor conventionally form iterative cuts for each node, striving for a more compact representation - a task which often fails 98% on average. Prior research has sought to mitigate computational cost through parallelization. In contrast, our approach leverages a classifier to prune unsuccessful cuts preemptively, thus eliminating unnecessary resynthesis operations. Experiments on the refactor operator using the EPFL benchmark suite and 10 large industrial designs demonstrate that this technique can speedup logic optimization by 3.9x on average compared with the state-of-the-art ABC implementation.
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
