表征和建模几何结构对超导纳米线低温晶体管性能的影响
Characterizing and modeling the influence of geometry on the performance of superconducting nanowire cryotrons
AI总结：
本研究表征了超导纳米线低温晶体管的关键性能指标并开发电热模型，发现器件几何结构对性能影响显著，在氮化铌上制造的器件实现了高增益、低能耗和低抖动，展示了其作为低温集成电路逻辑元件的潜力。
摘要：
将基于超导纳米线的器件扩展到更大阵列通常受限于与每个器件接口所需的布线。由纳米线低温晶体管（或称 nanocryotrons）构建的低温集成电路可通过在芯片上进行信号处理来解决这一限制。在本研究中，我们表征了 nanocryotron 的关键性能指标，以阐明其作为低温集成电路中逻辑元件的潜力，并开发了一个电热模型将材料参数与器件性能联系起来。我们发现 nanocryotron 的性能显著依赖于器件几何结构，且在优化增益、抖动和能耗之间存在权衡。我们证明了在氮化铌上制造的 nanocryotrons 对于 5 ns 长的输入脉冲可实现小于 210 nA 宽的灰区，对应最大可实现增益为 48 dB，每次操作的能耗小于 20 aJ，抖动小于 60 ps。
英文摘要：
The scaling of superconducting nanowire-based devices to larger arrays is often limited by the cabling required to interface with each device. Cryogenic integrated circuits constructed from nanowire cryotrons, or nanocryotrons, can address this limitation by performing signal processing on chip. In this study, we characterize key performance metrics of the nanocryotron to elucidate its potential as a logical element in cryogenic integrated circuits and develop an electro-thermal model to connect material parameters with device performance. We find that the performance of the nanocryotron depends significantly on the device geometry, and trade-offs are associated with optimizing the gain, jitter, and energy dissipation. We demonstrate that nanocryotrons fabricated on niobium nitride can achieve a grey zone less than 210 nA wide for a 5 ns long input pulse corresponding to a maximum achievable gain of 48 dB, an energy dissipation of less than 20 aJ per operation, and a jitter of less than 60 ps.
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