一种用于神经网络的高效通用光学加速器
An Efficient General-Purpose Optical Accelerator for Neural Networks
AI总结：
提出一种由MZI模块与微环谐振器连接的混合通用光学加速器架构，利用遗传算法优化参数和SVD扩展权重矩阵，显著提升了神经网络映射效率并降低了能耗与延迟。
摘要：
通用光学加速器（GOAs）因其低延迟和低能耗，已成为加速深度神经网络（DNNs）的有前景的平台。此类加速器通常由给定数量的交错马赫-曾德尔干涉仪（MZIs）组成。然而，由于权重矩阵与GOA架构之间的不匹配，这种交错架构在加速各种大小的神经网络时效率较低。在本研究中，提出了一种混合GOA架构，以提高神经网络向GOA的映射效率。在该架构中，独立的MZI模块与微环谐振器（MRRs）相连，从而可以组合起来高效处理大型神经网络。每个模块实现一个酉矩阵，其输入由可调系数调整。使用遗传算法搜索所提架构的参数。为了提高神经网络的准确性，将选定的权重矩阵扩展为应用奇异值分解（SVD）的多个酉矩阵。神经网络中的卷积核也进行了调整，以充分利用片上计算资源。实验结果表明，在给定数量的MZIs下，所提架构上神经网络的映射效率在Cifar10和Cifar100数据集上分别对VGG16和Resnet18提高了21.87%、21.20%、24.69%和25.52%。能耗和计算延迟也可分别降低超过67%和21%。
英文摘要：
General-purpose optical accelerators (GOAs) have emerged as a promising platform to accelerate deep neural networks (DNNs) due to their low latency and energy consumption. Such an accelerator is usually composed of a given number of interleaving Mach-Zehnder- Interferometers (MZIs). This interleaving architecture, however, has a low efficiency when accelerating neural networks of various sizes due to the mismatch between weight matrices and the GOA architecture. In this work, a hybrid GOA architecture is proposed to enhance the mapping efficiency of neural networks onto the GOA. In this architecture, independent MZI modules are connected with microring resonators (MRRs), so that they can be combined to process large neural networks efficiently. Each of these modules implements a unitary matrix with inputs adjusted by tunable coefficients. The parameters of the proposed architecture are searched using genetic algorithm. To enhance the accuracy of neural networks, selected weight matrices are expanded to multiple unitary matrices applying singular value decomposition (SVD). The kernels in neural networks are also adjusted to use up the on-chip computational resources. Experimental results show that with a given number of MZIs, the mapping efficiency of neural networks on the proposed architecture can be enhanced by 21.87%, 21.20%, 24.69%, and 25.52% for VGG16 and Resnet18 on datasets Cifar10 and Cifar100, respectively. The energy consumption and computation latency can also be reduced by over 67% and 21%, respectively.
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