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arXiv 2409.06140cs.DCcs.ETcs.SYeess.SY
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存内计算的关键:面向 RRAM 中向量-矩阵乘法的基准测试框架

The Lynchpin of In-Memory Computing: A Benchmarking Framework for Vector-Matrix Multiplication in RRAMs

Md Tawsif Rahman Chowdhury, Huynh Quang Nguyen Vo, Paritosh Ramanan, Murat Yildirim, Gozde Tutuncuoglu

AI总结:

针对 RRAM 存内 VMM 计算中器件与电路缺陷导致的误差传播问题,提出端到端基准测试框架 MELISO,用于评估、表征并缓解误差。

摘要:

冯·诺依曼瓶颈是传统计算机体系结构中的一项根本性挑战,其成因在于连接处理单元与存储单元的共享总线导致取指操作与数据操作无法同时执行。该瓶颈显著限制了系统性能,增加了能耗,并加剧了计算复杂性。诸如阻变随机存取存储器(RRAM)等新兴技术利用交叉阵列,通过对模拟向量-矩阵乘法(VMM)操作进行存内计算,为满足数据密集型计算任务的需求提供了颇具前景的替代方案。然而,由器件和电路级缺陷引起的误差传播仍然是一项重大挑战。在本研究中,我们提出 MELISO(In-Memory Linear Solver,存内线性求解器),这是一个专为基于 RRAM 的系统定制的全面端到端 VMM 基准测试框架。MELISO 评估 VMM 操作中的误差传播,分析 RRAM 器件指标对误差幅度和分布的影响。本文介绍 MELISO 框架,并利用最先进的 RRAM 器件指标,展示其在表征和缓解 VMM 误差传播方面的效用。

英文摘要:

The Von Neumann bottleneck, a fundamental challenge in conventional computer architecture, arises from the inability to execute fetch and data operations simultaneously due to a shared bus linking processing and memory units. This bottleneck significantly limits system performance, increases energy consumption, and exacerbates computational complexity. Emerging technologies such as Resistive Random Access Memories (RRAMs), leveraging crossbar arrays, offer promising alternatives for addressing the demands of data-intensive computational tasks through in-memory computing of analog vector-matrix multiplication (VMM) operations. However, the propagation of errors due to device and circuit-level imperfections remains a significant challenge. In this study, we introduce MELISO (In-Memory Linear Solver), a comprehensive end-to-end VMM benchmarking framework tailored for RRAM-based systems. MELISO evaluates the error propagation in VMM operations, analyzing the impact of RRAM device metrics on error magnitude and distribution. This paper introduces the MELISO framework and demonstrates its utility in characterizing and mitigating VMM error propagation using state-of-the-art RRAM device metrics.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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