用于场效应晶体管量子输运预测的物理集成神经网络
Physics-integrated Neural Network for Quantum Transport Prediction of Field-effect Transistor
AI总结：
本文提出物理集成超向量神经网络PHVNN，通过引入五个物理特征预测亚5纳米GAA FET输运曲线，实现0.39的平均绝对误差，并高效筛选出与n型器件性能匹配的对称p型GAA FET，加速下一代电子器件设计。
摘要：
基于量子力学的输运模拟对于超短沟道场效应晶体管（FET）的设计具有重要意义，因为它能够帮助理解物理机制，但同时面临高计算强度的主要挑战。传统机器学习有望加速FET设计的优化，然而其在该领域的应用受到高保真数据集缺乏和物理知识整合不足的限制。在此，我们引入了一个物理集成神经网络框架，利用内部开发的高保真数据库来预测亚5纳米栅极全环绕（GAA）FET的输运曲线。数据库中的输运曲线收集自文献和我们的第一性原理计算。除硅之外，我们还纳入了砷化铟、磷化铟以及具有不同结构相的硒纳米线作为FET沟道材料。随后，我们构建了一个物理知识集成的超向量神经网络（PHVNN），在输入中加入了五个新的物理特征用于预测输运特性，实现了低至0.39的平均绝对误差。特别是，约98%的电流预测残差在一个数量级以内。利用PHVNN，我们高效筛选出了与n型器件具有相同品质因数的对称p型GAA FET，这对于制造同质CMOS电路至关重要。最后，我们的自动微分分析为PHVNN提供了可解释的见解，突出了新输入参数的重要贡献，并提高了PHVNN的可靠性。我们的方法为快速筛选合适的GAA FET提供了一种有效手段，有望加速下一代电子器件的设计过程。
英文摘要：
Quantum-mechanics-based transport simulation is of importance for the design of ultra-short channel field-effect transistors (FETs) with its capability of understanding the physical mechanism, while facing the primary challenge of the high computational intensity. Traditional machine learning is expected to accelerate the optimization of FET design, yet its application in this field is limited by the lack of both high-fidelity datasets and the integration of physical knowledge. Here, we introduced a physics-integrated neural network framework to predict the transport curves of sub-5-nm gate-all-around (GAA) FETs using an in-house developed high-fidelity database. The transport curves in the database are collected from literature and our first-principles calculations. Beyond silicon, we included indium arsenide, indium phosphide, and selenium nanowires with different structural phases as the FET channel materials. Then, we built a physical-knowledge-integrated hyper vector neural network (PHVNN), in which five new physical features were added into the inputs for prediction transport characteristics, achieving a sufficiently low mean absolute error of 0.39. In particular, ~98% of the current prediction residuals are within one order of magnitude. Using PHVNN, we efficiently screened out the symmetric p-type GAA FETs that possess the same figures of merit with the n-type ones, which are crucial for the fabrication of homogeneous CMOS circuits. Finally, our automatic differentiation analysis provides interpretable insights into the PHVNN, which highlights the important contributions of our new input parameters and improves the reliability of PHVNN. Our approach provides an effective method for rapidly screening appropriate GAA FETs with the prospect of accelerating the design process of next-generation electronic devices.
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