arXivDaily arXiv每日学术速递 周一至周五更新
arXiv周末暂无论文更新,休息一下吧,周末愉快~~
arXiv 2408.04334cs.AR
收藏

一种支持帧交织与集成译码的基于节点的极化列表译码器

A Node-Based Polar List Decoder with Frame Interleaving and Ensemble Decoding Support

Yuqing Ren, Leyu Zhang, Ludovic Damien Blanc, Yifei Shen, Xinwei Li, Alexios Balatsoukas-Stimming, Chuan Zhang, Andreas Burg

AI总结:

本文提出一种支持帧交织与图集成的广义基于节点的极化列表译码器,通过复用空闲单元、动态调度和在线指令生成,在28nm工艺下实现3.34 Gbps吞吐量,较现有最优译码器提升1.41倍。

摘要:

基于节点的逐次消除列表(SCL)译码因其显著降低译码延迟而在无线通信中受到广泛关注,尤其是对于5G新空口(NR)极化码。然而,现有的基于节点的SCL译码器受限于顺序处理,导致计算单元复杂且依赖数据,从而引入不可避免的停顿,降低了硬件效率。本文提出了一种用于广义基于节点的SCL译码器的帧交织硬件架构。通过高效复用原本空闲的计算单元,可以同时译码两个独立的帧,从而获得显著的吞吐量提升。基于这一新架构,我们进一步利用图集成来多样化译码空间,从而在有限列表大小下增强纠错性能。提出了两种动态策略来消除译码调度中的残余停顿,最终与最先进的基线基于节点的SCL译码器相比实现了近2倍的吞吐量。为了使译码器具备速率灵活性,我们开发了一种新颖的在线指令生成器,用于识别广义节点并实时生成指令。相应的28nm FD-SOI ASIC SCL译码器列表大小为8,核心面积为1.28 mm²,工作频率为692 MHz。它兼容所有5G NR极化码,对于上行链路(1024, 512)码实现了3.34 Gbps的吞吐量和2.62 Gbps/mm²的面积效率,分别比最先进的基于节点的SCL译码器提高了1.41倍和1.69倍。

英文摘要:

Node-based successive cancellation list (SCL) decoding has received considerable attention in wireless communications for its significant reduction in decoding latency, particularly with 5G New Radio (NR) polar codes. However, the existing node-based SCL decoders are constrained by sequential processing, leading to complicated and data-dependent computational units that introduce unavoidable stalls, reducing hardware efficiency. In this paper, we present a frame-interleaving hardware architecture for a generalized node-based SCL decoder. By efficiently reusing otherwise idle computational units, two independent frames can be decoded simultaneously, resulting in a significant throughput gain. Based on this new architecture, we further exploit graph ensembles to diversify the decoding space, thus enhancing the error-correcting performance with a limited list size. Two dynamic strategies are proposed to eliminate the residual stalls in the decoding schedule, which eventually results in nearly 2x throughput compared to the state-of-the-art baseline node-based SCL decoder. To impart the decoder rate flexibility, we develop a novel online instruction generator to identify the generalized nodes and produce instructions on-the-fly. The corresponding 28nm FD-SOI ASIC SCL decoder with a list size of 8 has a core area of 1.28 mm2 and operates at 692 MHz. It is compatible with all 5G NR polar codes and achieves a throughput of 3.34 Gbps and an area efficiency of 2.62 Gbps/mm2 for uplink (1024, 512) codes, which is 1.41x and 1.69x better than the state-of-the-art node-based SCL decoders.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

↑