Switchboard：用于大型硬件系统模块化仿真的开源框架
Switchboard: An Open-Source Framework for Modular Simulation of Large Hardware Systems
AI总结：
提出开源框架Switchboard，通过预构建仿真器和共享内存队列连接实现大型硬件系统的模块化仿真，显著改善构建时间和仿真速度，并在晶圆级RISC-V核心仿真等应用中验证其高效性和准确性。
摘要：
随着摩尔定律的衰退，扩大硬件系统规模已成为提升性能的重要策略。不幸的是，由于缓慢的吞吐量和漫长的构建时间，大型硬件系统的仿真往往成为设计瓶颈。在本文中，我们提出了一种针对由延迟不敏感接口连接的模块化块组成的设计的解决方案。我们的方法是以与设计本身类似的方式构建硬件仿真，为每个块使用预构建的仿真器，并在运行时通过快速共享内存队列连接这些仿真器。这改善了构建时间，因为仿真规模的扩大仅涉及运行更多预构建仿真器的实例。它还解决了仿真速度问题，因为预构建的仿真器可以并行运行，而无需细粒度同步或全局屏障。我们介绍了一个实现我们方法的框架Switchboard，并讨论了两个应用，展示了其速度、可扩展性和准确性：（1）一个Web应用程序，用户可以在其中运行chiplets在interposer上的快速仿真；（2）一个晶圆级仿真，模拟分布在数千个云计算核心上的100万个RISC-V核心。
英文摘要：
Scaling up hardware systems has become an important tactic for improving performance as Moore's law fades. Unfortunately, simulations of large hardware systems are often a design bottleneck due to slow throughput and long build times. In this article, we propose a solution targeting designs composed of modular blocks connected by latency-insensitive interfaces. Our approach is to construct the hardware simulation in a similar fashion as the design itself, using a prebuilt simulator for each block and connecting the simulators via fast shared-memory queues at runtime. This improves build time, because simulation scale-up simply involves running more instances of the prebuilt simulators. It also addresses simulation speed, because prebuilt simulators can run in parallel, without fine-grained synchronization or global barriers. We introduce a framework, Switchboard, that implements our approach, and discuss two applications, demonstrating its speed, scalability, and accuracy: (1) a web application where users can run fast simulations of chiplets on an interposer, and (2) a wafer-scale simulation of one million RISC-V cores distributed across thousands of cloud compute cores.
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
