ARMAN：一种用于卷积神经网络的可重构单片三维加速器架构
ARMAN: A Reconfigurable Monolithic 3D Accelerator Architecture for Convolutional Neural Networks
AI总结：
针对不同CNN模型对加速器架构需求各异的问题，提出基于M3D技术的可重构脉动阵列加速器ARMAN，通过灵活配置实现功耗、能量和性能的优化，在多个基准上实现最高2倍、2.24倍、1.48倍和2倍的改进。
摘要：
卷积神经网络（CNN）已成为人工智能（AI）应用中强大且多功能的工具。传统计算架构在满足计算密集型CNN应用的高处理需求方面面临挑战，因为它们存在吞吐量有限和利用率低的问题。为此，已开发出专门的加速器来加速CNN计算。然而，正如本文通过广泛的设计空间探索所展示的，不同的神经网络模型具有不同的特征，这需要不同的加速器架构和配置来匹配其计算需求。我们表明，一种一刀切的固定架构并不能保证最佳的功耗/能量/性能权衡。为了克服这一挑战，本文提出了ARMAN，一种基于单片三维（M3D）技术的用于CNN推理的新型可重构脉动阵列加速器架构。所提出的加速器提供了根据神经网络结构在不同的扩展或缩减配置之间进行重新配置的灵活性，为各种神经网络模型提供了功耗、能量和性能之间的最佳权衡。我们通过对多个基准的评估证明了我们方法的有效性。结果表明，与非可配置架构相比，所提出的加速器在执行周期、功耗、能量和EDP方面分别表现出高达2倍、2.24倍、1.48倍和2倍的改进。
英文摘要：
The Convolutional Neural Network (CNN) has emerged as a powerful and versatile tool for artificial intelligence (AI) applications. Conventional computing architectures face challenges in meeting the demanding processing requirements of compute-intensive CNN applications, as they suffer from limited throughput and low utilization. To this end, specialized accelerators have been developed to speed up CNN computations. However, as we demonstrate in this paper via extensive design space exploration, different neural network models have different characteristics, which calls for different accelerator architectures and configurations to match their computing demand. We show that a one-size-fits-all fixed architecture does not guarantee optimal power/energy/performance trade-off. To overcome this challenge, this paper proposes ARMAN, a novel reconfigurable systolic-array-based accelerator architecture based on Monolithic 3D (M3D) technology for CNN inference. The proposed accelerator offers the flexibility to reconfigure among different scale-up or scale-out arrangements depending on the neural network structure, providing the optimal trade-off across power, energy, and performance for various neural network models. We demonstrate the effectiveness of our approach through evaluations of multiple benchmarks. The results demonstrate that the proposed accelerator exhibits up to 2x, 2.24x, 1.48x, and 2x improvements in terms of execution cycles, power, energy, and EDP respectively, over the non-configurable architecture.
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
