像素探测器与各向异性导电胶的混合集成
Pixel detector hybridization and integration with anisotropic conductive adhesives
AI总结：
针对混合像素探测器开发，提出基于各向异性导电胶和化学镀镍浸金的单芯片互连工艺，经多种尺寸验证，优化后提升电镀均匀性与互连良率。
摘要：
混合像素探测器的开发需要一种可靠且经济高效的互连技术。该互连技术需适应各自应用的节距和芯片尺寸。对于小规模应用以及在ASIC和传感器开发阶段，互连技术还必须适用于通常从多项目晶圆提交中获得的单芯片的组装。在CERN EP研发计划和AIDAinnova合作框架内，正在为未来对撞机中的像素探测器应用开发创新且可扩展的混合方案。本文介绍了基于各向异性导电胶（ACA）的新开发内部单芯片互连工艺的最新成果。ACA互连技术用嵌入环氧树脂层中的导电微粒子替代焊料凸点，该环氧树脂层以薄膜或浆料形式施加。传感器与ASIC之间的电机械连接通过使用倒装芯片键合设备对ACA进行热压实现。需要特定的像素焊盘拓扑结构，以通过微粒子实现连接并形成可使多余环氧树脂流入的空腔。该像素焊盘拓扑结构通过项目内部正在开发的化学镀镍浸金（ENIG）工艺实现。ENIG和ACA工艺已通过多种不同的ASIC、传感器和专用测试结构进行验证，焊盘直径范围为12微米至140微米，节距介于20微米至1.3毫米之间。所生产的组件通过电学特性测试、放射性源照射以及高动量粒子束测试进行表征。重点介绍了近期对电镀和互连工艺的优化，这些优化改善了电镀均匀性和互连良率。
英文摘要：
A reliable and cost-effective interconnect technology is required for the development of hybrid pixel detectors. The interconnect technology needs to be adapted for the pitch and die sizes of the respective applications. For small-scale applications and during the ASIC and sensor development phase, interconnect technologies must also be suitable for the assembly of single-dies typically available from Multi-Project-Wafer submissions. Within the CERN EP R&D program and the AIDAinnova collaboration, innovative and scalable hybridization concepts are under development for pixel-detector applications in future colliders. This contribution presents recent results of a newly developed in-house single-die interconnection process based on Anisotropic Conductive Adhesives (ACA). The ACA interconnect technology replaces solder bumps with conductive micro-particles embedded in an epoxy layer applied as either film or paste. The electro-mechanical connection between the sensor and ASIC is achieved via thermocompression of the ACA using a flip-chip device bonder. A specific pixel-pad topology is required to enable the connection via micro-particles and create cavities into which excess epoxy can flow. This pixel-pad topology is achieved with an in-house Electroless Nickel Immersion Gold process that is also under development within the project. The ENIG and ACA processes are qualified with a variety of different ASICs, sensors, and dedicated test structures, with pad diameters ranging from 12 μm to 140 μm and pitches between 20 μm and 1.3 mm. The produced assemblies are characterized electrically, with radioactive-source exposures, and in tests with high-momentum particle beams. A focus is placed on recent optimization of the plating and interconnect processes, resulting in an improved plating uniformity and interconnect yield.
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