由单指令核心组成的多核系统的可靠性增强
Enhancement in Reliability for Multi-core system consisting of One Instruction Cores
AI总结:
本文提出一种由单指令核心构成的经济型非对称多核系统MCSOIC,利用OIC作为热备份冗余核心为传统核心提供短期容错支持,并通过OSS模型进行可靠性分析,实验表明其功耗和面积开销分别仅为0.46%和11.4%。
摘要:
CMOS器件尺寸的快速缩小使得单个芯片上集成了数十亿个晶体管,进而导致众多核心的集成,并带来了许多挑战,例如功耗增加、热耗散增加、瞬态故障和永久故障的发生。在多核场景中,核心级的瞬态故障和永久故障缓解已成为一项重要的设计参数。核心级技术是一种基于冗余的故障缓解技术,可提高多核系统的寿命可靠性。在非对称多核系统中,较小核心为较大核心提供容错能力,这是一种核心级故障缓解技术,已获得许多研究者的关注并逐渐成为研究热点。本文提出了一种经济型、由单指令核心(One Instruction Cores)构成的非对称多核系统(MCSOIC)。术语“硬件成本估计”表示对MCS-OIC进行功耗和面积估计。在MCSOIC中,OIC是一种热备份冗余核心。OIC在较短时间内为传统核心提供功能支持。为评估该思想,使用FPGA和ASIC综合了不同配置的MCSOIC。最大功耗开销和最大面积开销分别为0.46%和11.4%。使用一次性系统(One-Shot System, OSS)模型对MCS-OIC中OIC的行为进行建模,以进行可靠性分析。将OSS的模型参数,即就绪度、唤醒概率和启动策略,映射到带有OIC的多核系统。推导了系统可靠性的表达式,并对特殊情况下的系统可靠性进行了估计。
英文摘要:
Rapid CMOS device size reduction resulted in billions of transistors on a chip have led to integration of many cores leading to many challenges such as increased power dissipation, thermal dissipation, occurrence of transient faults and permanent faults. The mitigation of transient faults and permanent faults at the core level has become an important design parameter in a multi-core scenario. Core level techniques is a redundancy-based fault mitigation technique that improves the lifetime reliability of multi-core systems. In an asymmetric multi-core system, the smaller cores provide fault tolerance to larger cores is a core level fault mitigation technique that has gained momentum and focus from many researchers. The paper presents an economical, asymmetric multi-core system with one instruction cores (MCSOIC). The term Hardware Cost Estimation signifies power and area estimation for MCS-OIC. In MCSOIC, OIC is a warm standby redundant core. OICs provide functional support to conventional cores for shorter periods of time. To evaluate the idea, different configurations of MCSOIC is synthesized using FPGA and ASIC. The maximum power overhead and maximum area overhead are 0.46% and 11.4% respectively. The behavior of OICs in MCS-OIC is modelled using a One-Shot System (OSS) model for reliability analysis. The model parameters namely, readiness, wakeup probability and start-up-strategy for OSS are mapped to the multi-core systems with OICs. Expressions for system reliability is derived. System reliability is estimated for special cases.
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