TinyVers：一种用于ML极限推理的状态保持eMRAM微型多功能片上系统
TinyVers: A Tiny Versatile System-on-chip with State-Retentive eMRAM for ML Inference at the Extreme Edge
摘要：
极端边缘设备或物联网节点需要超低功耗始终在线处理以及按需采样和处理的能力。此外，支持物联网应用，如话音识别、机器监控等，需要能够执行各种ML工作负载。这给硬件设计带来了挑战，以构建在超低功耗状态下运行的灵活处理器。本文介绍了TinyVers，这是一种小型多功能超低功耗ML片上系统，可在极端边缘实现增强的智能。TinyVers利用低功耗重新配置来实现多模式支持和积极的片上电源管理，以实现占空比，从而实现智能传感应用。该SoC结合了RISC-V主机处理器、17 TOPS/W低功耗可重配置ML加速器、1.7 $μ$ W深度睡眠唤醒控制器以及用于引导代码和ML参数保留的eMRAM。该SoC可执行高达17.6 GOPS，同时实现1.7 $μ$ W-20 mW的功耗范围。针对不同应用程序的多个ML工作负载映射到SoC上，以展示其灵活性和效率。所有型号均达到1-2 TOPS/W的能效，连续运行时功耗低于230 $μ$ W。在机器监控的占空比使用案例中，此功率降至10 $μ$ W以下。
英文摘要：
Extreme edge devices or Internet-of-thing nodes require both ultra-low power always-on processing as well as the ability to do on-demand sampling and processing. Moreover, support for IoT applications like voice recognition, machine monitoring, etc., requires the ability to execute a wide range of ML workloads. This brings challenges in hardware design to build flexible processors operating in ultra-low power regime. This paper presents TinyVers, a tiny versatile ultra-low power ML system-on-chip to enable enhanced intelligence at the Extreme Edge. TinyVers exploits dataflow reconfiguration to enable multi-modal support and aggressive on-chip power management for duty-cycling to enable smart sensing applications. The SoC combines a RISC-V host processor, a 17 TOPS/W dataflow reconfigurable ML accelerator, a 1.7 $μ$W deep sleep wake-up controller, and an eMRAM for boot code and ML parameter retention. The SoC can perform up to 17.6 GOPS while achieving a power consumption range from 1.7 $μ$W-20 mW. Multiple ML workloads aimed for diverse applications are mapped on the SoC to showcase its flexibility and efficiency. All the models achieve 1-2 TOPS/W of energy efficiency with power consumption below 230 $μ$W in continuous operation. In a duty-cycling use case for machine monitoring, this power is reduced to below 10 $μ$W.
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
