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arXiv 2301.02785cs.AR
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Duet:在处理器与嵌入式FPGA之间创造和谐

Duet: Creating Harmony between Processors and Embedded FPGAs

Princeton University(普林斯顿大学)

Ang Li, August Ning, David Wentzlaff

AI总结:

Duet通过非侵入式双向缓存一致集成,使嵌入式FPGA与处理器成为平等伙伴,通过细粒度加速和硬件增强提升性能,实验表明通信延迟降低82%,带宽提升9.5倍。

摘要:

摩尔定律的衰落促使硬件加速兴起,但现有方法忽视了更广泛领域中的细粒度加速机会。本文提出Duet,一种可扩展的多核-FPGA架构,通过非侵入式双向缓存一致集成,使嵌入式FPGA(eFPGA)与处理器成为平等伙伴。与现有CPU-FPGA混合系统不同,Duet通过两种后流片增强技术释放处理器和eFPGA的全部潜力:细粒度加速将应用划分为小任务,将频繁调用的计算密集型任务卸载到各种小加速器上,利用处理器处理动态控制流和较少可加速的任务;硬件增强利用eFPGA模拟的硬件小部件提高处理器效率或减轻某些执行模型的软件开销。Duet的RTL级实现用于高保真度评估。实验表明,Duet可将处理器-加速器通信延迟降低高达82%,带宽提升高达9.5倍。进一步使用七个应用基准测试评估RTL实现,实现1.5-24.9倍的加速。

英文摘要:

The demise of Moore's Law has led to the rise of hardware acceleration. However, the focus on accelerating stable algorithms in their entirety neglects the abundant fine-grained acceleration opportunities available in broader domains and squanders host processors' compute power. This paper presents Duet, a scalable, manycore-FPGA architecture that promotes embedded FPGAs (eFPGA) to be equal peers with processors through non-intrusive, bi-directionally cache-coherent integration. In contrast to existing CPU-FPGA hybrid systems in which the processors play a supportive role, Duet unleashes the full potential of both the processors and the eFPGAs with two classes of post-fabrication enhancements: fine-grained acceleration, which partitions an application into small tasks and offloads the frequently-invoked, compute-intensive ones onto various small accelerators, leveraging the processors to handle dynamic control flow and less accelerable tasks; hardware augmentation, which employs eFPGA-emulated hardware widgets to improve processor efficiency or mitigate software overheads in certain execution models. An RTL-level implementation of Duet is developed to evaluate the architecture with high fidelity. Experiments using synthetic benchmarks show that Duet can reduce the processor-accelerator communication latency by up to 82% and increase the bandwidth by up to 9.5x. The RTL implementation is further evaluated with seven application benchmarks, achieving 1.5-24.9x speedup.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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