通过拓扑能隙协议的 InAs-Al 混合器件
InAs-Al Hybrid Devices Passing the Topological Gap Protocol
AI总结：
本文制备并优化 InAs-Al 半导体-超导体异质结器件，通过严格的拓扑能隙协议观测到稳定拓扑相和两端零偏压电导峰，为 Majorana 零模融合与编织奠定基础。
摘要：
我们展示了半导体-超导体异质结器件的测量与模拟结果，这些结果与观测到拓扑超导性和 Majorana 零模相符。器件由高迁移率二维电子气制备，其中通过静电栅极定义准一维导线。这些器件能够测量局域和非局域输运性质，并已通过大量模拟进行优化，以确保对非均匀性和无序的稳健性。我们的主要结果是，若干按照该设计的工程规范制备的器件通过了 Pikulin 等人 [arXiv:2103.12217] 所定义的拓扑能隙协议。该协议是一项严格测试，由一系列三端局域和非局域输运测量组成，测量过程中改变磁场、半导体电子密度和结透明度。通过该协议表明，根据大规模无序模拟的判定，检测到承载 Majorana 零模的拓扑相具有很高概率。我们的实验结果与进入拓扑超导相的量子相变一致；该拓扑相在磁场方向跨越数百毫特、在栅极电压方向跨越数毫伏，对应于半导体导线中约一百微电子伏特的 Zeeman 能和化学势范围。这些区域表现出体能隙闭合并重新打开，同时在器件两端出现零偏压电导峰，并且这些峰能够承受结透明度变化。从我们的器件中提取的最大拓扑能隙为 20–60 μeV。这一演示是开展涉及 Majorana 零模融合和编织实验的先决条件。
英文摘要：
We present measurements and simulations of semiconductor-superconductor heterostructure devices that are consistent with the observation of topological superconductivity and Majorana zero modes. The devices are fabricated from high-mobility two-dimensional electron gases in which quasi-one-dimensional wires are defined by electrostatic gates. These devices enable measurements of local and non-local transport properties and have been optimized via extensive simulations to ensure robustness against non-uniformity and disorder. Our main result is that several devices, fabricated according to the design's engineering specifications, have passed the topological gap protocol defined in Pikulin et al. [arXiv:2103.12217]. This protocol is a stringent test composed of a sequence of three-terminal local and non-local transport measurements performed while varying the magnetic field, semiconductor electron density, and junction transparencies. Passing the protocol indicates a high probability of detection of a topological phase hosting Majorana zero modes as determined by large-scale disorder simulations. Our experimental results are consistent with a quantum phase transition into a topological superconducting phase that extends over several hundred millitesla in magnetic field and several millivolts in gate voltage, corresponding to approximately one hundred micro-electron-volts in Zeeman energy and chemical potential in the semiconducting wire. These regions feature a closing and re-opening of the bulk gap, with simultaneous zero-bias conductance peaks at both ends of the devices that withstand changes in the junction transparencies. The extracted maximum topological gaps in our devices are 20-60 $μ$eV. This demonstration is a prerequisite for experiments involving fusion and braiding of Majorana zero modes.
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