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arXiv 2204.07656cond-mat.mes-hallcond-mat.mtrl-scicond-mat.str-el
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碳掺杂过渡金属氧化物(TMOs)和后过渡金属氧化物(PTMOs)中的普适非极性开关

Universal Non-Polar Switching in Carbon-doped Transition Metal Oxides (TMOs) and Post TMOs

C. A. Paz de Araujo, Jolanta Celinska, Chris R. McWilliams, Lucian Shifren, Greg Yeric, X. M. Henry Huang, Saurabh Vinayak Suryavanshi, Glen Rosendale, Valeri A… 展开作者

C. A. Paz de Araujo, Jolanta Celinska, Chris R. McWilliams, Lucian Shifren, Greg Yeric, X. M. Henry Huang, Saurabh Vinayak Suryavanshi, Glen Rosendale, Valeri Afanas'ev, Eduardo C. Marino, Dushyant Madhav Narayan, Daniel S Dessau

AI总结:

本研究发现碳掺杂TMOs和PTMOs具有普适非极性电阻开关特性,建立电子主导开关模型,实现极端温区运行与高保持力,并制备出47 nm、1 kbit的CMOS兼容CeRAM 1T1R阵列,展现高性能非易失性存储器应用潜力。

摘要:

过渡金属氧化物(TMOs)和后过渡金属氧化物(PTMOs)在掺杂碳后表现出非易失性电流-电压(I-V)特性,该特性兼具普适性与可重复性。我们提供了光谱学证据,证明碳基杂质态会在已有的较宽带隙内部引入,有效形成更小的带隙,我们认为这可能会引发类莫特(Mott-like)关联效应。我们的发现为TMOs和PTMOs中尚未被理解的单极性和非极性电阻开关提供了新的见解。我们证实器件开关不依赖热能,并建立了一种以电子为主导的开关模型,该模型可支持极端温度运行(1.5 K至423 K),且在673 K烘烤1小时的条件下仍能保持状态。重要的是,我们在工业工艺中优化了该技术,并在300 mm晶圆上制备了集成的1晶体管/1电阻(1T1R)阵列,规模最高达1 kbit,器件尺寸为47 nm,可用于先进节点CMOS兼容的关联电子随机存取存储器(CeRAM)。这类器件可在2 ns写入脉冲下工作,且存储状态在200℃下可保持24小时。所展现的一系列特性,包括可缩小至最先进尺寸、极端高低温下的非易失性运行、快速写入,以及相较于ReRAM等丝状存储器更低的随机性,彰显了其作为高性能两端线后端非易失性存储器的潜力。

英文摘要:

Transition metal oxides (TMOs) and post-TMOs (PTMOs), when doped with Carbon, show non-volatile current-voltage (I-V) characteristics, which are both universal and repeatable. We have shown spectroscopic evidence of the introduction of carbon-based impurity states inside the existing larger bandgap effectively creating a smaller bandgap which we suggest could enable Mott-like correlation effect. Our findings indicate new insights for yet to be understood unipolar and nonpolar resistive switching in the TMOs and PTMOs. We have shown that device switching is not thermal-energy dependent and have developed an electronic-dominated switching model that allows for the extreme temperature operation (from 1.5 K to 423 K) and state retention up to 673 K for a 1-hour bake. Importantly, we have optimized the technology in an industrial process and demonstrated integrated 1-transistor/1-resistor (1T1R) arrays up to 1 kbit with 47 nm devices on 300 mm wafers for advanced node CMOS-compatible correlated electron RAM (CeRAM). These devices are shown to operate with 2 ns write pulses and retain the memory states up to 200 C for 24 hours. The collection of attributes shown, including scalability to state-of-the-art dimensions, non-volatile operation to extreme low and high temperatures, fast write, and reduced stochasticity as compared to filamentary memories such as ReRAMs show the potential for a highly capable two-terminal back-end-of-line non-volatile memory.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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