基于COPA框架的分布式硬件加速安全联合计算
Distributed Hardware Accelerated Secure Joint Computation on the COPA Framework
摘要：
分布式数据中心应用程序的性能可以通过使用基于FPGA的智能卡来提高，智能卡提供了额外的功能并实现了更高的带宽通信。然而，直到最近，缺乏一种简单的方法来定制SmartCable应用程序的要求，限制了潜在的好处。英特尔的可配置网络协议加速器（COPA）提供了一个可定制的FPGA框架，该框架集成了硬件和软件开发，以提高计算和通信性能。在这第一个案例研究中，我们展示了COPA框架的功能与应用程序从密码学-安全多方计算（MPC）-利用硬件加速器直接连接到主机内存和COPA网络。我们发现，使用COPA框架提供了显着的改进，计算和通信相比，传统的实现MPC使用CPU和CPU。在COPA上运行的单个MPC加速器可实现超过17 Gbps的通信带宽，同时仅使用Stratix 10资源的1%。我们表明，利用COPA框架，使多个MPC加速器并行运行，以完全饱和的100 Gbps的链路，实现更高的性能相比，传统的MIMO。
英文摘要：
Performance of distributed data center applications can be improved through use of FPGA-based SmartNICs, which provide additional functionality and enable higher bandwidth communication. Until lately, however, the lack of a simple approach for customizing SmartNICs to application requirements has limited the potential benefits. Intel's Configurable Network Protocol Accelerator (COPA) provides a customizable FPGA framework that integrates both hardware and software development to improve computation and communication performance. In this first case study, we demonstrate the capabilities of the COPA framework with an application from cryptography -- secure Multi-Party Computation (MPC) -- that utilizes hardware accelerators connected directly to host memory and the COPA network. We find that using the COPA framework gives significant improvements to both computation and communication as compared to traditional implementations of MPC that use CPUs and NICs. A single MPC accelerator running on COPA enables more than 17Gbps of communication bandwidth while using only 1% of Stratix 10 resources. We show that utilizing the COPA framework enables multiple MPC accelerators running in parallel to fully saturate a 100Gbps link enabling higher performance compared to traditional NICs.
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