Lagarto I-Una plataforma hardware/software de arquitectura de computadoras para la academia e academión
Lagarto I-Una plataforma hardware/software de arquitectura de computadoras para la academia e investigación
摘要：
微处理器计算机体系结构设计是计算机科学和计算机工程专业的一门基础课程。在过去的二十年里，微处理器内部的技术和组织发生了相当快的变化。这种变化增加了课堂上处理的信息，使学生的教/学过程变得困难。虽然有一些工具，主要是模拟器，可用于在课程中解释抽象概念，但这些工具并没有与技术一起出现。墨西哥IPN的Centro de Investigación en Computación的计算机体系结构小组正在开展一个名为Lagarto的项目，为研究和教育创建一个开放的计算平台，以简化对计算机体系结构和操作系统中所涉及的基本概念的理解。本文介绍了Lagarto，我们的软核处理器微架构。它具有标量流水线结构，执行完整的MIPS 32 R6 ISA [9] [10]，并包括一个MMU以支持现代操作系统。完整的设计已经使用Verilog HDL描述，并在FPGA中完全合成。此外，这项工作显示了不同的方法来使用和测试的微处理器与代码编写的汇编语言或C语言。我们表明，Lagarto项目允许学生在课程期间不仅通过模拟器在实际练习中将传统的理论知识可视化模型，而且还将RTL设计融入教学过程，以构建微处理器架构。
英文摘要：
The design of Microprocessors Computer Architectures remains as a fundamental course in Computer Science and Computer Engineering. The technology and organization inside microprocessors have changed quite fast in the last twenty years. That change has increased the information handled in class, difficulting the teaching/learning process among students. Although there are tools, mainly simulators, available to exemplify abstract concepts during the course, these tools have not come along with the technology. The computer architecture group of the Centro de Investigación en Computación at the IPN Mexico is working on a project called Lagarto to create an open computing platform for research and education to simplify the understanding of fundamental concepts involved in computer architecture and operating systems. This paper introduces Lagarto, our soft-core-processor micro-architecture. It has a scalar pipeline structure and executes a full MIPS 32 R6 ISA [9] [10] and includes an MMU to support modern Operative Systems. The complete design has been described using Verilog HDL and is fully synthesizable in an FPGA. Additionally, this work shows different ways to use and test the microprocessor with codes written in either assembly language or C language. We show that the Lagarto project allows students to incorporate during the course not only the traditional model of visualizing theoretical knowledge in a practical exercise through simulators but also integrate into the teaching process the RTL design to build the Microprocessor Architecture.
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