使用Julia语言进行高级综合
High-level Synthesis using the Julia Language
摘要：
FPGA和高级综合（HLS）工具的不断增长导致了对设计用于复杂运算和算法的硬件加速器的极大兴趣。然而，现有的HLS工具流程通常需要大量的用户知识或培训，才能在工业和研究应用中有效。在本文中，我们建议使用Julia语言作为HLS工具的基础。Julia HLS工具旨在通过利用Julia语言的可读性和允许使用现有的Julia编写的大型标准数学函数库来降低硬件加速的入门门槛。我们提出了一个原型Julia HLS工具，写在朱莉娅，Julia代码转换为VHDL。我们强调Julia及其编译器的功能如何简化了该工具的创建，并讨论了未来工作的潜在方向。
英文摘要：
The growing proliferation of FPGAs and High-level Synthesis (HLS) tools has led to a large interest in designing hardware accelerators for complex operations and algorithms. However, existing HLS toolflows typically require a significant amount of user knowledge or training to be effective in both industrial and research applications. In this paper, we propose using the Julia language as the basis for an HLS tool. The Julia HLS tool aims to decrease the barrier to entry for hardware acceleration by taking advantage of the readability of the Julia language and by allowing the use of the existing large library of standard mathematical functions written in Julia. We present a prototype Julia HLS tool, written in Julia, that transforms Julia code to VHDL. We highlight how features of Julia and its compiler simplified the creation of this tool, and we discuss potential directions for future work.
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