MURPHY——三维块结构同位网格上科学计算的可扩展多分辨率框架
MURPHY -- A scalable multiresolution framework for scientific computing on 3D block-structured collocated grids
AI总结：
本文提出MURPHY，一个基于八叉树三维块结构同位网格的多分辨率自适应框架，利用任意阶提升小波控制误差并压缩网格，结合有限差分和高阶离散，通过MPI-RMA并行实现高达16,384核的可扩展性能。
摘要：
我们提出了一个用于基于八叉树的三维块结构同位网格上数值模拟的多分辨率自适应网格框架的推导、实现和分析，该框架适用于分布式计算架构。我们的方法提供了一致处理任意阶非提升和提升插值小波的方法，通过二阶、四阶和六阶小波进行了演示，并与基于标准有限差分离散算子相结合。我们首先验证了所用小波族在网格粗化时提供严格且显式的误差控制，并表明提升小波在保持跨层级离散矩的同时提高了网格压缩率。此外，我们证明了高阶PDE离散格式与足够高阶的小波相结合，即使在分辨率跳跃处也能保持预期的收敛阶数。然后，我们模拟了一个标量的平流，以分析PDE时间演化的收敛性。结果表明，我们基于小波的细化准则能有效控制整体误差，而粗化准则能有效在压缩网格上保留相关信息。我们的软件利用块结构网格数据结构进行高效的多层级操作，并结合了依赖于单边MPI-RMA通信和主动PSCW同步的并行化策略。通过高达16,384核的性能测试，我们证明了这带来了高度可扩展的性能。相关代码以BSD-3许可证在https://github.com/vanreeslab/murphy上提供。
英文摘要：
We present the derivation, implementation, and analysis of a multiresolution adaptive grid framework for numerical simulations on octree-based 3D block-structured collocated grids with distributed computational architectures. Our approach provides a consistent handling of non-lifted and lifted interpolating wavelets of arbitrary order demonstrated using second, fourth, and sixth order wavelets, combined with standard finite-difference based discretization operators. We first validate that the wavelet family used provides strict and explicit error control when coarsening the grid, and show that lifting wavelets increase the grid compression rate while conserving discrete moments across levels. Further, we demonstrate that high-order PDE discretization schemes combined with sufficiently high order wavelets retain the expected convergence order even at resolution jumps. We then simulate the advection of a scalar to analyze convergence for the temporal evolution of a PDE. The results shows that our wavelet-based refinement criterion is successful at controlling the overall error while the coarsening criterion is effective at retaining the relevant information on a compressed grid. Our software exploits a block-structured grid data structure for efficient multi-level operations, combined with a parallelization strategy that relies on a one-sided MPI-RMA communication approach with active PSCW synchronization. Using performance tests up to 16,384 cores, we demonstrate that this leads to a highly scalable performance. The associated code is available under a BSD-3 license at https://github.com/vanreeslab/murphy.
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