基于单层MoS2沟道的栅控二元阻性RAM的高阻开关效应及其形成工艺
Superior Resistance Switching in Monolayer MoS2 Channel Based Gated Binary Resistive RAM via Gate-Bias Dependence and a Unique Forming Process
摘要：
在这项工作中，我们揭示了RS的影响，引起的电流-电压滞后周期在CVD生长的单层二硫化钼为基础的门控RRAM，其晶体管的电气和可靠性特性。一个独特的栅极电压依赖于RS的确定有显着的影响的开关性能的MoS 2 RRAM。RS行为被发现是显着依赖于沟道中的电荷传导。此外，我们已经表明了一个潜在的器件形成事件时，二硫化钼门RRAM进行稳态电应力。滞后和稳态电应力被发现干扰这些门控RRAM的晶体管动作，这实际上可以被用作RS的签名。有趣的是，电流-电压滞后导致单极RS，而在RS测量之前的稳态电应力导致双极RS。此外，这种电应力的连续应力循环导致多个电阻状态，这是一种类似于突触特性的行为，如长时程增强和长时程抑制，通常在忆阻器中发现。我们发现，在MoS 2 FET中占主导地位的电荷传输机制与稳态应力诱导的器件形成一起决定了在这些基于MoS 2的门控RRAM中诱导的RS的程度。最后的见解的基础上，从依赖于电荷传输机制和稳态应力诱导形成的二硫化钼沟道，我们提出了一定的稳态电应力条件，可用作形成过程之前使用的二硫化钼为基础的二进制RRAM的开关性能的改善。
英文摘要：
In this work, we unveil the effect of RS, induced by a current-voltage hysteresis cycles across CVD-grown monolayer MoS2 based gated RRAM, on its transistors electrical and reliability characteristics. A unique gate voltage dependence on the RS is identified which has a remarkable impact on the switching performance of MoS2 RRAM. RS behavior was found to be significantly dependent on the charge conduction in the channel. Moreover, we have shown a potential device forming event when MoS2 gated RRAMs were subjected to a steady-state electrical stress. Both hysteresis and steady state electrical stress were found to disturb the transistor action of these gated RRAMs, which in fact can be used as a signature of RS. Interestingly, current-voltage hysteresis resulted in unipolar RS, whereas steady-state electrical stress before RS measurement led to bipolar RS. Moreover, successive stress cycles of such an electrical stress leads to multiple resistance states, a behavior similar to synaptic properties like long-term potentiation and long-term depression, typically found in memristors. We find that charge transport mechanism dominant in the MoS2 FET in conjunction with steady-state stress induced device forming determine the extent of RS induced in these MoS2 based gated RRAMs. Finally on the basis of insights developed from the dependence on charge transport mechanism and steady-state stress induced forming of MoS2 channel, we propose a certain steady-state electrical stress condition which can be used as a forming process employed prior to use of MoS2 based binary RRAMs for improved switching performance.
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