Coherence on：基于学习的异构SoCs加速器一致性演示
Cohmeleon: Learning-Based Orchestration of Accelerator Coherence in Heterogeneous SoCs
摘要：
在异构SoC架构中集成松耦合加速器的最关键方面之一是协调它们与存储层次结构的交互，特别是在导航各种高速缓存一致性选项方面：从绕过高速缓存层次结构直接访问片外存储器的加速器到拥有自己的专用高速缓存的加速器。通过在基于FPGA的多加速器多核SoC原型上运行实际大小的应用程序，我们证明了给定加速器的最佳缓存一致性模式在运行时会有所不同，这取决于加速器的特性、工作负载大小和整体SoC状态。Cohesion应用强化学习，在运行时动态地为每个加速器选择最佳的一致性模式，而不是在设计时静态地选择。它通过持续观察系统并测量其性能，自适应地做出这些选择。Cohesion与加速器无关，与架构无关，并且需要最少的硬件支持。Cohesion对应用程序员也是透明的，软件开销可以忽略不计。基于FPGA的实验表明，我们的运行时的方法提供了，平均而言，38%的加速比，减少了66%的片外存储器访问相比，国家的最先进的设计时的方法。此外，它可以匹配为目标体系结构手动调优的运行时解决方案。
英文摘要：
One of the most critical aspects of integrating loosely-coupled accelerators in heterogeneous SoC architectures is orchestrating their interactions with the memory hierarchy, especially in terms of navigating the various cache-coherence options: from accelerators accessing off-chip memory directly, bypassing the cache hierarchy, to accelerators having their own private cache. By running real-size applications on FPGA-based prototypes of many-accelerator multi-core SoCs, we show that the best cache-coherence mode for a given accelerator varies at runtime, depending on the accelerator's characteristics, the workload size, and the overall SoC status. Cohmeleon applies reinforcement learning to select the best coherence mode for each accelerator dynamically at runtime, as opposed to statically at design time. It makes these selections adaptively, by continuously observing the system and measuring its performance. Cohmeleon is accelerator-agnostic, architecture-independent, and it requires minimal hardware support. Cohmeleon is also transparent to application programmers and has a negligible software overhead. FPGA-based experiments show that our runtime approach offers, on average, a 38% speedup with a 66% reduction of off-chip memory accesses compared to state-of-the-art design-time approaches. Moreover, it can match runtime solutions that are manually tuned for the target architecture.
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
