支持扩展RISC-V GPU体系结构的CUDA
Supporting CUDA for an extended RISC-V GPU architecture
摘要:
随着科学计算的快速发展,越来越多的研究人员和开发人员致力于在不同的设备上实现各种工作负载/操作。在所有这些设备中,NVIDIA GPU由于其全面的文档和出色的开发工具而成为最受欢迎的选择。因此,有丰富的资源用于手写高性能CUDA代码。然而,CUDA主要只由商业产品支持,没有对开源H/W平台的支持。RISC-V是硬件ISA最受欢迎的选择,这要归功于其优雅的设计和开源许可证。在这个项目中,我们的目标是利用这些现有的CUDA代码与RISC-V设备。更具体地说,我们设计并实现了一个可以在RISC-V GPU架构上执行CUDA源代码的流水线。我们已经成功地在RISC-V GPU架构上执行了具有多个重要功能的CUDA内核,如多线程和原子指令。
英文摘要:
With the rapid development of scientific computation, more and more researchers and developers are committed to implementing various workloads/operations on different devices. Among all these devices, NVIDIA GPU is the most popular choice due to its comprehensive documentation and excellent development tools. As a result, there are abundant resources for hand-writing high-performance CUDA codes. However, CUDA is mainly supported by only commercial products and there has been no support for open-source H/W platforms. RISC-V is the most popular choice for hardware ISA, thanks to its elegant design and open-source license. In this project, we aim to utilize these existing CUDA codes with RISC-V devices. More specifically, we design and implement a pipeline that can execute CUDA source code on an RISC-V GPU architecture. We have succeeded in executing CUDA kernels with several important features, like multi-thread and atomic instructions, on an RISC-V GPU architecture.
机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。