Toffoli Fredkin可逆电路的可测性设计
Testable Designs of Toffoli Fredkin Reversible Circuits
摘要：
传统逻辑电路中的每一位的丢失都涉及到以热的形式向环境中散发的功率耗散。可逆逻辑是能够通过防止比特丢失来减轻这种耗散的替代方案之一。它也有可能拓宽未来计算的视野，将其应用于量子计算。应用测试策略的逻辑电路是一个必要的，保证他们的真正功能，研究人员在与即将到来的挑战和协议的可逆逻辑电路的解决方案。第四，提出了基于Toffoli门、Fredkin门和混合Toffoli-Fredkin门的可逆电路可测性设计的新方法。所提出的设计与实现技术无关，在获得稳定的制造环境后，可用于实际的硬件设备。在RCViewer和RevKit工具上对所提出的模型进行了实验，以验证成本度量的功能和计算。故障模拟进行了使用C++和Java计算故障覆盖率在各自的方法。结果证实，所有提出的工作优于现有的最先进的方法。
英文摘要：
Loss of every bit in traditional logic circuits involves dissipation of power in the form of heat that evolve to the environment. Reversible logic is one of the alternatives that have capabilities to mitigate this dissipation by preventing the loss of bits. It also have the potential to broaden the horizon of futuristic reckon with its applications to quantum computation. Application of testing strategies to the logic circuits is a necessity that guarantees their true functioning where the researchers are at par with solutions for the upcoming challenges and agreements for reversible logic circuits. Novel methods of designing Toffoli, Fredkin and mixed Toffoli-Fredkin gates based reversible circuits for testability are put fourth in this article. The proposed designs are independent of the implementation techniques and can be brought into real hardware devices after obtaining a stable fabrication environment. The experimentation for the proposed models are performed on RCViewer and RevKit tools to verify the functionality and computation of cost metrics. Fault simulations are carried out using C++ and Java to calculate fault coverage in respective methodologies. The results confirmed that all the presented work outperforms existing state-of-art approaches.
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