基于增强型DNN数据流表示的精确可扩展MAC阵列的分类和基准测试
Taxonomy and Benchmarking of Precision-Scalable MAC Arrays Under Enhanced DNN Dataflow Representation
摘要：
降低精度和可变精度的乘法累加（MAC）运算为显著提高DNN加速器的能效和吞吐量提供了机会，而没有/有限的算法性能损失，为在资源受限的边缘设备上部署AI应用铺平了道路。因此，最近提出了各种精度可扩展MAC阵列（PSMA）架构。然而，很难在这些替代方案之间进行公平的比较，因为每种拟议的PSMA都在不同的系统和技术中得到了证明。这项工作的目的是提供一个清晰的PSMA的设计空间的视图，并提供见解，选择基于设计师的需求的最佳架构。首先，我们引入了DNN递归流的精度增强的for循环表示。接下来，我们使用这种新的表示方法来构建一个全面的PSMA分类，能够系统地覆盖最先进的PSMA，并揭示新的PSMA架构。接下来，我们构建了一个高度参数化的PSMA模板，可以在设计时将其配置到分类法所涵盖的设计空间的巨大子集中。这允许对72种不同的PSMA架构进行公平和彻底的基准测试。我们在28 nm技术中进行此类研究，目标是在200 MHz和1 GHz下运行8到2位的运行时精度可扩展性。分析由此产生的能量和面积分解揭示了PSMA架构的关键设计准则。
英文摘要：
Reduced-precision and variable-precision multiply-accumulate (MAC) operations provide opportunities to significantly improve energy efficiency and throughput of DNN accelerators with no/limited algorithmic performance loss, paving a way towards deploying AI applications on resource-constraint edge devices. Accordingly, various precision-scalable MAC array (PSMA) architectures were proposed recently. However, it is difficult to make a fair comparison between those alternatives, as each proposed PSMA is demonstrated in different systems and technologies. This work aims to provide a clear view of the design space of PSMA and offer insights for selecting the optimal architectures based on designers' needs. First, we introduce a precision-enhanced for-loop representation for DNN dataflows. Next, we use this new representation towards a comprehensive PSMA taxonomy, capable of systematically covering most prominent state-of-the-art PSMAs, as well as uncovering new PSMA architectures. Following that, we build a highly parameterized PSMA template that can be design-time configured into a huge subset of the design space spanned by the taxonomy. This allows to fairly and thoroughly benchmark 72 different PSMA architectures. We perform such studies in 28nm technology targeting run-time precision scalability from 8 to 2 bits, operating at 200 MHz and 1 GHz. Analyzing resulting energy and area breakdowns reveals key design guidelines for PSMA architectures.
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
