There is increasing demand for specialized hardware for training deep neural networks, both in edge/IoT environments and in high-performance computing systems. The design space of such hardware is very large due to the wide range of processing architectures, deep neural network configurations, and dataflow options. This makes developing deep neural network processors quite complex, especially for training. We present TRIM, an infrastructure to help hardware architects explore the design space of deep neural network accelerators for both inference and training in the early design stages. The model evaluates at the whole network level, considering both inter-layer and intra-layer activities. Given applications, essential hardware specifications, and a design goal, TRIM can quickly explore different hardware design options, select the optimal dataflow and guide new hardware architecture design. We validated TRIM with FPGA-based implementation of deep neural network accelerators and ASIC-based architectures. We also show how to use TRIM to explore the design space through several case studies. TRIM is a powerful tool to help architects evaluate different hardware choices to develop efficient inference and training architecture design.
DxPTA: An Architecture Design Space Exploration with Optical Dataflow-guided Strategy for HW/SW Co-Design of Photonic Transformer Accelerators
eBRAIN Lab, Division of Engineering, New York University (NYU) Abu Dhabi（eBRAIN实验室，工程学院，纽约大学（NYU）阿布扎赫德分校）；Photonic Research Lab (PRL), Division of Engineering, New York University (NYU) Abu Dhabi（光子研究实验室（PRL），工程学院，纽约大学（NYU）阿布扎赫德分校）；New York University (NYU) Abu Dhabi（纽约大学（NYU）阿布扎赫德分校）
Loom: Exploiting Weight and Activation Precisions to Accelerate Convolutional Neural Networks
University of Toronto（多伦多大学）
介绍了一种用于卷积神经网络（CNN）的硬件推理加速器Loom（LM）。在LM中，可以节省的每一位数据精度都转化为成比例的性能增益。具体来说，对于卷积层，LM的执行时间与权重和激活的精度成反比。对于全连接层，LM的性能与权重的精度成反比。LM的目标是面积和带宽受限的片上系统设计，例如那些在移动设备上无法负担存储片上每层所需的多兆字节缓冲区的设计。因此，在给定数据带宽预算的情况下，LM相对于等效的位并行加速器提高了能量效率和性能。对于权重和激活，LM可以利用轮廓导出的每层精度。然而，在运行时，LM进一步以比层粒度小得多的粒度调整激活精度。此外，它可以自然地以比层更小的粒度利用权重精度可变性。平均而言，在几个图像分类CNN中，对于每个周期可以执行相当于128个16 b x 16 b乘法累加操作的配置，LM的性能比最先进的位并行加速器[1]高出4.38倍，而精度没有任何损失，同时能效高出3.54倍。LM可以在执行性能和能源效率的额外改进上权衡准确性，并且与仅针对激活精度的加速器相比是有利的。我们还研究了2位和4位LM变体，发现每周期2位变体是最节能的。
