基于可制造三端电子突触的改进Hopfield网络优化
Improved Hopfield Network Optimization using Manufacturable Three-terminal Electronic Synapses
摘要：
我们描述通过模拟新的优化算法的Hopfield神经网络构造使用可制造的三端硅-氧化物-氮化物-氧化物-硅（SONOS）突触器件。我们首先提出了一个计算轻，忆阻器为基础的，高度精确的紧凑型模型的SONOS。使用紧凑的模型，我们描述了Hopfield网络中的模拟退火技术，利用不完善的问题定义，电流泄漏，和连续的可调SONOS，使瞬态混沌群动力学。我们预计，相对于最好的CPU和GPU，优化的能耗和延迟至少提高了4个数量级，并且还超过了最好的基于忆阻器的硬件;同时，错误恢复硬件大小增加了100倍（即，问题大小）。
英文摘要：
We describe via simulation novel optimization algorithms for a Hopfield neural network constructed using manufacturable three-terminal Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) synaptic devices. We first present a computationally-light, memristor-based, highly accurate compact model for the SONOS. Using the compact model, we describe techniques of simulated annealing in Hopfield networks by exploiting imperfect problem definitions, current leakage, and the continuous tunability of the SONOS to enable transient chaotic group dynamics. We project improvements in energy consumption and latency for optimization relative to the best CPUs and GPUs by at least 4 orders of magnitude, and also exceeding the best projected memristor-based hardware; along with a 100-fold increase in error-resilient hardware size (i.e., problem size).
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