衡量真正重要的东西：为TinyML优化神经网络
Measuring what Really Matters: Optimizing Neural Networks for TinyML
摘要：
随着廉价的计算和存储资源的激增，神经网络（NN）在架构和计算复杂性方面经历了前所未有的增长。将NN引入资源受限的设备可以实现经济高效的部署、广泛的可用性和敏感数据的保存。这项工作解决了将机器学习引入MCU的挑战，我们专注于无处不在的ARM Cortex-M架构。优化方法、软件框架和MCU硬件架构对推理延迟和能耗等关键性能指标的详细影响和权衡，以前尚未针对TensorFlow Lite Micro等最先进的框架进行深入研究。我们发现，经验调查，衡量可感知的指标-性能体验的用户-是必不可少的，因为专门的指令和层类型的影响可能是微妙的。为此，我们提出了一个实现感知的设计作为一个具有成本效益的方法进行验证和基准测试。利用我们开发的工具链，我们演示了如何通过系统地优化NN以适应其目标应用场景来改进资源受限设备上的现有NN部署。
英文摘要：
With the surge of inexpensive computational and memory resources, neural networks (NNs) have experienced an unprecedented growth in architectural and computational complexity. Introducing NNs to resource-constrained devices enables cost-efficient deployments, widespread availability, and the preservation of sensitive data. This work addresses the challenges of bringing Machine Learning to MCUs, where we focus on the ubiquitous ARM Cortex-M architecture. The detailed effects and trade-offs that optimization methods, software frameworks, and MCU hardware architecture have on key performance metrics such as inference latency and energy consumption have not been previously studied in depth for state-of-the-art frameworks such as TensorFlow Lite Micro. We find that empirical investigations which measure the perceptible metrics - performance as experienced by the user - are indispensable, as the impact of specialized instructions and layer types can be subtle. To this end, we propose an implementation-aware design as a cost-effective method for verification and benchmarking. Employing our developed toolchain, we demonstrate how existing NN deployments on resource-constrained devices can be improved by systematically optimizing NNs to their targeted application scenario.
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