BlockGNN：使用块循环权重矩阵实现高效的GNN加速
BlockGNN: Towards Efficient GNN Acceleration Using Block-Circulant Weight Matrices
摘要：
近年来，图神经网络（GNNs）似乎是分析非欧图数据的最先进算法。通过应用深度学习从图结构中提取高级表示，GNN在各种任务中实现了非凡的准确性和强大的泛化能力。然而，随着图形尺寸的不断增加，越来越复杂的GNN层和更高的特征维数，GNN的计算复杂性呈指数增长。如何实时的推理GNN已经成为一个具有挑战性的问题，特别是对于一些资源有限的边缘计算平台。为了应对这一挑战，我们提出了BlockGNN，这是一种实现高效GNN加速的软硬件协同设计方法。在算法层面，我们建议利用块循环权重矩阵来大大降低各种GNN模型的复杂性。在硬件设计层面，我们提出了一种流水线CirCore架构，支持高效的块循环矩阵计算。基于CirCore，我们提出了一种新的BlockGNN加速器来计算各种低延迟的GNN。此外，为了确定不同的部署任务的最佳配置，我们还引入了一个性能和资源模型，帮助自动选择最佳的硬件参数。ZC 706 FPGA平台上的全面实验表明，在各种GNN任务上，与基线HyGCN架构相比，BlockGNN实现了高达$8.3\times$的加速，并且与Intel Xeon CPU平台相比，实现了$111.9\times$的节能。
英文摘要：
In recent years, Graph Neural Networks (GNNs) appear to be state-of-the-art algorithms for analyzing non-euclidean graph data. By applying deep-learning to extract high-level representations from graph structures, GNNs achieve extraordinary accuracy and great generalization ability in various tasks. However, with the ever-increasing graph sizes, more and more complicated GNN layers, and higher feature dimensions, the computational complexity of GNNs grows exponentially. How to inference GNNs in real time has become a challenging problem, especially for some resource-limited edge-computing platforms. To tackle this challenge, we propose BlockGNN, a software-hardware co-design approach to realize efficient GNN acceleration. At the algorithm level, we propose to leverage block-circulant weight matrices to greatly reduce the complexity of various GNN models. At the hardware design level, we propose a pipelined CirCore architecture, which supports efficient block-circulant matrices computation. Basing on CirCore, we present a novel BlockGNN accelerator to compute various GNNs with low latency. Moreover, to determine the optimal configurations for diverse deployed tasks, we also introduce a performance and resource model that helps choose the optimal hardware parameters automatically. Comprehensive experiments on the ZC706 FPGA platform demonstrate that on various GNN tasks, BlockGNN achieves up to $8.3\times$ speedup compared to the baseline HyGCN architecture and $111.9\times$ energy reduction compared to the Intel Xeon CPU platform.
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