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arXiv 2103.17082eess.SYcs.SY
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用于实时任务多核干扰分析的内存访问剖面静态提取

Static extraction of memory access profiles for multi-core interference analysis of real-time tasks

Thomas Carle, Hugues Cassé

摘要:

我们提出了一个多核处理器上运行的实时任务系统的静态分析框架。我们的方法分析任务隔离在二进制级别,并产生最坏情况下的时序和内存访问配置文件。然后,这些配置文件可以被组合以在任务系统级别执行干扰分析,作为多核最坏情况响应时间(WCRT)分析的一部分。在本文中,我们介绍了一个正式的描述的模型和算法构建块组成我们的框架。我们还讨论了我们的方法生成的内存访问配置文件可以用来养活现有的最先进的WCRT框架。据我们所知,这是第一次记录了如何为干扰分析方法提供合理、安全和精确的输入。

英文摘要:

We present a static analysis framework for real-time task systems running on multi-core processors. Our method analyzes tasks in isolation at the binary level and generates worst-case timing and memory access profiles. These profiles can then be combined to perform an interference analysis at the task system level, as part of a multi-core Worst-Case Response Time (WCRT) analysis. In this paper we introduce a formal description of the models and algorithmic building blocks composing our framework. We also discuss how the memory access profiles generated by our method could be used to feed existing state-of-the-art WCRT frameworks. To the best of our knowledge, it is the first time that a method is documented on how to produce sound, safe and precise inputs for interference analysis methods.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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