Abdulqader Mahmoud, Frederic Vanderveken, Florin Ciubotaru, Christoph Adelmann, Said Hamdioui, Sorin Cotofana
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This project has received funding from the European Union's Horizon 2020 research and innovation program under grant agreement No. 801055 "Spin Wave Computing for Ultimately-Scaled Hybrid Low-Power Electronics" CHIRON
Spin Waves(SWs) enable the realization of energy efficient circuits as they propagate and interfere within waveguides without consuming noticeable energy. However, SW computing can be even more energy efficient by taking advantage of the approximate computing paradigm as many applications are error-tolerant like multimedia and social media. In this paper we propose an ultra-low energy novel Approximate Full Adder(AFA) and a 2-bit inputs Multiplier(AMUL). We validate the correct functionality of our proposal by means of micromagnetic simulations and evaluate the approximate FA figure of merit against state-of-the-art accurate SW, 7nmCMOS, Spin Hall Effect(SHE), Domain Wall Motion(DWM), accurate and approximate 45nmCMOS, Magnetic Tunnel Junction(MTJ), and Spin-CMOS FA implementations. Our results indicate that AFA consumes 43% and 33% less energy than state-of-the-art accurate SW and 7nmCMOS FA, respectively, and saves 69% and 44% when compared with accurate and approximate 45nm CMOS, respectively, and provides a 2 orders of magnitude energy reduction when compared with accurate SHE, accurate and approximate DWM, MTJ, and Spin-CMOS, counterparts. In addition, it achieves the same error rate as approximate 45nmCMOS and Spin-CMOS FA whereas it exhibits 50% less error rate than the approximate DWM FA. Furthermore, it outperforms its contenders in terms of area by saving at least 29% chip real-estate. AMUL is evaluated and compared with state-of-the-art accurate SW and 16nm CMOS accurate and approximate state-of-the-art designs. The evaluation results indicate that it saves at least 2x and 5x energy in comparison with the state-of-the-art SW designs and 16nm CMOS accurate and approximate designs, respectively, and has an average error rate of 10%, while the approximate CMOS MUL has an average error rate of 13%, and requires at least 64% less chip real-estate.
University College London(伦敦大学学院);Tohoku University(东北大学);University of Messina(墨西拿大学);University of Duisburg-Essen(杜伊斯堡-埃森大学);Imperial College London(帝国理工学院);National Institute of Advanced Industrial Science and Technology (AIST)(国立产业技术综合研究所);University of Gothenburg(哥德堡大学)
Spin Vector Control for Heisenberg-Inspired Probabilistic Computing
Purdue University(普渡大学);Birck Nanotechnology Center, Purdue University(普渡大学比尔克纳米技术中心);University of California, Santa Barbara(加州大学圣塔芭芭拉分校);King Fahd University of Petroleum & Minerals (KFUPM)(法赫德国王石油与矿产大学)