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arXiv 2103.08117cs.LOcs.PL
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验证混合系统信号时序逻辑规范的程序逻辑:扩展技术报告

A Program Logic to Verify Signal Temporal Logic Specifications of Hybrid Systems: Extended Technical Report

Hammad Ahmad, Jean-Baptiste Jeannin

摘要:

信号时序逻辑(STL)被引入到连续和混合系统的连续时间信号的时间特性监测。引入微分动态逻辑(dL)对混合程序的结束状态进行推理。在过去的十年中,STL及其变体在行业中用于监控目的的普及程度显著提高,而dL在混合系统的验证方面也越来越受欢迎。在本文中,我们通过引入信号时序动态逻辑(STdL)-一个动态逻辑的原因,STL规范的一个子集的混合动力系统的执行之间的差距。我们的工作表明,STL可以用于混合系统的演绎验证。STdL通过允许在给定的时间间隔内对时间属性进行推理来显着增强dL的表达能力。我们提供了一个语义和STdL的证明演算,以及证明的合理性和相对完整性。

英文摘要:

Signal temporal logic (STL) was introduced for monitoring temporal properties of continuous-time signals for continuous and hybrid systems. Differential dynamic logic (dL) was introduced to reason about the end states of a hybrid program. Over the past decade, STL and its variants have significantly gained in popularity in the industry for monitoring purposes, while dL has gained in popularity for verification of hybrid systems. In this paper, we bridge the gap between the two different logics by introducing signal temporal dynamic logic (STdL) -- a dynamic logic that reasons about a subset of STL specifications over executions of hybrid systems. Our work demonstrates that STL can be used for deductive verification of hybrid systems. STdL significantly augments the expressiveness of dL by allowing reasoning about temporal properties in given time intervals. We provide a semantics and a proof calculus for STdL, along with a proof of soundness and relative completeness.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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