基于CFG的硬件辅助CFI方案的比较分析与改进
Comparative Analysis and Enhancement of CFG-based Hardware-Assisted CFI Schemes
摘要：
颠覆指令流（例如，通过使用代码重用攻击）仍然对当今系统的安全性构成严重威胁。各种控制流完整性（CFI）计划已被提出作为一个强大的技术来检测和减轻这种攻击。近年来，学术界提出了许多基于控制流图（CFG）的CFI实施的硬件辅助实现。这种方法通过限制有效目标地址来检查控制流传输是否遵循预期的CFG。然而，这些论文都针对不同的平台，并使用不同的基准应用程序进行评估，这使得定量比较几乎不可能。在本文中，我们已经实现了多个有前途的基于CFG的CFI方案在一个共同的平台上，包括一个RISC-V SoC内的FPGA。通过将近40个基准测试应用程序移植到该系统，我们可以在运行时性能、硬件利用率和二进制大小方面对各种技术进行有意义的比较。此外，我们提出了一个增强的CFI方法，我们认为最好的概念和想法，以前提出的机制的启发。我们通过解决以前基本上被忽视的一些问题，使这种方法更加实用和功能完整。我们表明，这个细粒度的计划，CFI可以实现更少的开销比以前证明。
英文摘要：
Subverting the flow of instructions (e.g., by use of code-reuse attacks) still poses a serious threat to the security of today's systems. Various control flow integrity (CFI) schemes have been proposed as a powerful technique to detect and mitigate such attacks. In recent years, many hardware-assisted implementations of CFI enforcement based on control flow graphs (CFGs) have been presented by academia. Such approaches check whether control flow transfers follow the intended CFG by limiting the valid target addresses. However, these papers all target different platforms and were evaluated with different sets of benchmark applications, which makes quantitative comparisons hardly possible. For this paper, we have implemented multiple promising CFG-based CFI schemes on a common platform comprising a RISC-V SoC within an FPGA. By porting almost 40 benchmark applications to this system we can present a meaningful comparison of the various techniques in terms of run-time performance, hardware utilization, and binary size. In addition, we present an enhanced CFI approach that is inspired by what we consider the best concepts and ideas of previously proposed mechanisms. We have made this approach more practical and feature-complete by tackling some problems largely ignored previously. We show with this fine-grained scheme that CFI can be achieved with even less overheads than previously demonstrated.
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