In the era of noisy intermediate-scale quantum (NISQ), executing quantum algorithms on actual quantum devices faces unique challenges. One such challenge is that quantum devices in this era have restricted connectivity: quantum gates are allowed to act only on specific pairs of physical qubits. For this reason, a quantum circuit needs to go through a compiling process called qubit routing before it can be executed on a quantum computer. In this study, we propose a CNOT synthesis method called the token reduction method to solve this problem. The token reduction method works for all quantum computers whose architecture is represented by connected graphs. A major difference between our method and the existing ones is that our method synthesizes a circuit to an output qubit mapping that might be different from the input qubit mapping. The final mapping for the synthesis is determined dynamically during the synthesis process. Results showed that our algorithm consistently outperforms the best publicly accessible algorithm for all of the tested quantum architectures.
While mapping a quantum circuit to the physical layer one has to consider the numerous constraints imposed by the underlying hardware architecture. Connectivity of the physical qubits is one such constraint that restricts two-qubit operations, such as CNOT, to "connected" qubits. SWAP gates can be used to place the logical qubits on admissible physical qubits, but they entail a significant increase in CNOT-count. In this paper we consider the problem of reducing the CNOT-count in Clifford+T circuits on connectivity constrained architectures, like noisy intermediate-scale quantum (NISQ) computi…
We present a framework for the synthesis of phase polynomials that addresses both cases of full connectivity and partial connectivity for NISQ architectures. In most cases, our algorithms generate circuits with lower CNOT count and CNOT depth than the state of the art or have a significantly smaller running time for similar performances. We also provide methods that can be applied to our algorithms in order to trade an increase in the CNOT count for a decrease in execution time, thereby filling the gap between our algorithms and faster ones.
Quantum computers in practice today require strict memory constraints, where 2-qubit operations can only be performed between the qubits closest to each other in a graph structure. So a quantum circuit must undergo a transformation to the graph before it can be implemented. In this paper, we study the optimization of the CNOT circuits on some noisy intermediate-scale quantum(NISQ) devices. Compared with previous works, we decompose it into two sub-problems: optimization with a given initial qubit distribution and optimization without limitations of initial qubit distribution. We find that most…
Current proposals for quantum compilers require the synthesis and optimization of linear reversible circuits and among them CNOT circuits. Since these circuits represent a significant part of the cost of running an entire quantum circuit, we aim at reducing their size. In this paper we present a new algorithm for the synthesis of CNOT circuits based on the solution of the syndrome decoding problem. Our method addresses the case of ideal hardware with an all-to-all qubit connectivity and the case of near-term quantum devices with restricted connectivity. For both cases, we present benchmarks sh…
A CNOT circuit is the key gadget for entangling qubits in quantum computing systems. However, the qubit connectivity of noisy intermediate-scale quantum (NISQ) devices is constrained by their {limited connectivity architecture}. To improve the performance of CNOT circuits on NISQ devices, we investigate the optimization of the size/depth of CNOT circuits under the limited connectivity architecture. We present a method that can optimize the size of any $n$-qubit CNOT circuit $O\left(\frac{n^2}{\log δ}\right)$ on any connected graph with minimum degree $δ$, and prove this bound is optimal for th…
The exponential speed up of quantum algorithms and the fundamental limits of current CMOS process for future design technology have directed attentions toward quantum circuits. In this paper, the matrix specification of a broad category of quantum circuits, i.e. CNOT-based circuits, are investigated. We prove that the matrix elements of CNOT-based circuits can only be zeros or ones. In addition, the columns or rows of such a matrix have exactly one element with the value of 1. Furthermore, we show that these specifications can be used to synthesize CNOT-based quantum circuits. In other words, …
In this work, we propose IQGAN, a quantum Generative Adversarial Network (GAN) framework for multiqubit image synthesis that can be efficiently implemented on Noisy Intermediate Scale Quantum (NISQ) devices. We investigate the reasons for the inferior generative performance of current quantum GANs in our preliminary study and conclude that an adjustable input encoder is the key to ensuring high-quality data synthesis. We then propose the IQGAN architecture featuring a trainable multiqubit quantum encoder that effectively embeds classical data into quantum states. Furthermore, we propose a comp…
The optimal cost of a three-qubit Fredkin gate is 5 two-qubit entangling gates, and the overhead climbs to 8 when restricted to controlled-not (CNOT) gates. By harnessing higher-dimensional Hilbert spaces, we reduce the cost of a three-qubit Fredkin gate from 8 CNOTs to 5 nearest-neighbor CNOTs. We also present construction of an n-control-qubit Fredkin gate with 2n+3 CNOTs and 2n single-qudit operations. Finally, we design deterministic and nondeterministic three-qubit Fredkin gates in photonic architectures. The cost of a nondeterministic three-qubit Fredkin gate is further reduced to 4 near…
As superconducting qubits continue to advance technologically, the realization of quantum algorithms from theoretical abstraction to physical implementation requires knowledge of both quantum circuit construction as well as hardware limitations. In this study we present results from experiments run on IBM's 20-qubit `Poughkeepsie' architecture, with the goal of demonstrating various qubit qualities and challenges that arise in designing quantum algorithms. These include experimentally measuring $T_1$ and $T_2$ coherence times, gate fidelities, sequential CNOT gates, techniques for handling anc…
In this note we present explicit canonical forms for all the elements in the two-qubit CNOT-Dihedral group, with minimal numbers of controlled-S (CS) and controlled-X (CX) gates, using the generating set of quantum gates [X, T, CX, CS]. We provide an algorithm to successively construct the n-qubit CNOT-Dihedral group, asserting an optimal number of controlled-X (CX) gates. These results are needed to estimate gate errors via non-Clifford randomized benchmarking and may have further applications to circuit optimization over fault-tolerant gate sets.
Routing plays an important role in programming noisy, intermediate-scale quantum (NISQ) devices, where limited connectivity in the register is overcome by swapping quantum information between locations. However, routing a quantum state using noisy gates introduces non-trivial noise dynamics, and deciding on an optimal route to minimize accumulated error requires estimates of the expected state fidelity. Here we validate a model for state-dependent routing dynamics in a NISQ processor based on correlated binary noise. We develop a composable, state-dependent noise model for CNOT and SWAP operat…
The decomposition of matrices associated to two-qubit and three-qubit orthogonal gates is studied, and based on the decomposition the synthesis of these gates is investigated. The optimal synthesis of general two-qubit orthogonal gate is obtained. For two-qubit unimodular orthogonal gate, it requires at most 2 CNOT gates and 6 one-qubit Ry gates. For the general three-qubit unimodular orthogonal gate, it can be synthesized by 16 CNOT gates and 36 one-qubit Ry and Rz gates in the worst case.
The Poisson equation has many applications across the broad areas of science and engineering. Most quantum algorithms for the Poisson solver presented so far, either suffer from lack of accuracy and/or are limited to very small sizes of the problem, and thus have no practical usage. Here we present an advanced quantum algorithm for solving the Poisson equation with high accuracy and dynamically tunable problem size. After converting the Poisson equation to the linear systems through the finite difference method, we adopt the Harrow-Hassidim-Lloyd (HHL) algorithm as the basic framework. Particu…
A breadth-first search method for determining optimal 3-line circuits composed of quantum NOT, CNOT, controlled-V and controlled-V+ (NCV) gates is introduced. Results are presented for simple gate count and for technology motivated cost metrics. The optimal NCV circuits are also compared to NCV circuits derived from optimal NOT, CNOT and Toffoli (NCT) gate circuits. The work presented here provides basic results and motivation for continued study of the direct synthesis of NCV circuits, and establishes relations between function realizations in different circuit cost metrics.
It is imperative to compile quantum circuits for Noisy Intermediate-Scale Quantum (NISQ) devices because of the limited connectivity of physical qubits and the high error rates of gate operations. One of the most critical steps in quantum circuit compilation is qubit routing, an NP-Hard problem that involves placing and moving logical qubits to minimize compilation overhead. In this study, we propose ISing mAchine Assisted Quantum compiler (ISAAQ) to perform qubit routing with Ising machines, which can efficiently solve Quadratic Unconstrained Binary Optimization (QUBO) problems. ISAAQ accurat…
Error mitigation is one of the key challenges in realising the full potential of quantum cryptographic protocols. Consequently, there is a lot of interest in adapting techniques from quantum error correction (QEC) to improve the robustness of quantum cryptographic protocols. In this work, we benchmark the performance of different QKD protocols on noisy quantum devices, with and without error correction. We obtain the secure key rates of BB84, B92 and BBM92 QKD protocols over a quantum channel that is subject to amplitude-damping noise. We demonstrate, theoretically and via implementations on t…
We give analytical solutions for the time-optimal synthesis of entangling gates between indirectly coupled qubits 1 and 3 in a linear spin chain of three qubits subject to an Ising Hamiltonian interaction with equal coupling $J$ plus a local magnetic field acting on the intermediate qubit. The energy available is fixed, but we relax the standard assumption of instantaneous unitary operations acting on single qubits. The time required for performing an entangling gate which is equivalent, modulo local unitary operations, to the $\mathrm{CNOT}(1, 3)$ between the indirectly coupled qubits 1 and 3…
Decoherence -- in the current physical implementations of quantum computers -- makes depth reduction a vital task in quantum-circuit design. Moore and Nilsson (SIAM Journal of Computing, 2001) demonstrated that additional qubits -- known as ancillae -- can be used to provide an extended space to parallelize quantum circuits. Specifically, they proved that, with $O(n^2)$ ancillae, any $n$-qubit CNOT circuit can be transformed into an equivalent one of $O(\log n)$ depth. However, the near-term quantum technologies can only support a limited amount of qubits, making space-depth trade-off a fundam…
The current phase of quantum computing is in the Noisy Intermediate-Scale Quantum (NISQ) era. On NISQ devices, two-qubit gates such as CNOTs are much noisier than single-qubit gates, so it is essential to minimize their count. Quantum circuit synthesis is a process of decomposing an arbitrary unitary into a sequence of quantum gates, and can be used as an optimization tool to produce shorter circuits to improve overall circuit fidelity. However, the time-to-solution of synthesis grows exponentially with the number of qubits. As a result, synthesis is intractable for circuits on a large qubit s…
Currently available quantum computing hardware platforms have limited 2-qubit connectivity among their addressable qubits. In order to run a generic quantum algorithm on such a platform, one has to transform the initial logical quantum circuit describing the algorithm into an equivalent one that obeys the connectivity restrictions. In this work we construct a circuit synthesis scheme that takes as input the qubit connectivity graph and a quantum circuit over the gate set generated by $\{\text{CNOT},R_{Z}\}$ and outputs a circuit that respects the connectivity of the device. As a concrete appli…
Control modular addition is a core arithmetic function, and we must consider the computational cost for actual quantum computers to realize efficient implementation. To achieve a low computational cost in a control modular adder, we focus on minimizing KQ, defined by the product of the number of qubits and the depth of the circuit. In this paper, we construct an efficient control modular adder with small KQ by using relative-phase Toffoli gates in two major types of quantum computers: Fault-Tolerant Quantum Computers (FTQ) on the Logical layer and Noisy Intermediate-Scale Quantum Computers (NI…
Many physical implementations of quantum computers impose stringent memory constraints in which 2-qubit operations can only be performed between qubits which are nearest neighbours in a lattice or graph structure. Hence, before a computation can be run on such a device, it must be mapped onto the physical architecture. That is, logical qubits must be assigned physical locations in the quantum memory, and the circuit must be replaced by an equivalent one containing only operations between nearest neighbours. In this paper, we give a new technique for quantum circuit mapping (a.k.a. routing), ba…
Recently, there has been an emergence of useful applications for noisy intermediate-scale quantum (NISQ) devices notably, though not exclusively, in the fields of quantum machine learning and variational quantum algorithms. In such applications, circuits of various depths and composed of different sets of gates are run on NISQ devices. Therefore, it is crucial to find practical ways to capture the general performance of circuits on these devices. Motivated by this pressing need, we modified the standard Clifford randomized benchmarking (RB) and interleaved RB schemes targeting them to hardware…
AlphaCNOT: Learning CNOT Minimization with Model-Based Planning
University of Udine Udine Italy；University of Udine \& University ``Federico II'' of Naples Udine \& Naples Italy；University of Udine；University of Udine \& University ``Federico II'' of Naples
In addition to readout errors, two-qubit gate noise is the main challenge for complex quantum algorithms on noisy intermediate-scale quantum (NISQ) computers. These errors are a significant challenge for making accurate calculations for quantum chemistry, nuclear physics, high energy physics, and other emerging scientific and industrial applications. There are two proposals for mitigating two-qubit gate errors: error-correcting codes and zero-noise extrapolation. This paper focuses on the latter, studying it in detail and proposing modifications to existing approaches. In particular, we propos…
In this paper, the problem of constructing an efficient quantum circuit for the implementation of an arbitrary quantum computation is addressed. To this end, a basic block based on the cosine-sine decomposition method is suggested which contains $l$ qubits. In addition, a previously proposed quantum-logic synthesis method based on quantum Shannon decomposition is recursively applied to reach unitary gates over $l$ qubits. Then, the basic block is used and some optimizations are applied to remove redundant gates. It is shown that the exact value of $l$ affects the number of one-qubit and CNOT g…
Noisy Intermediate-Scale Quantum (NISQ) devices fail to produce outputs with sufficient fidelity for deep circuits with many gates today. Such devices suffer from read-out, multi-qubit gate and crosstalk noise combined with short decoherence times limiting circuit depth. This work develops a methodology to generate shorter circuits with fewer multi-qubit gates whose unitary transformations approximate the original reference one. It explores the benefit of such generated approximations under NISQ devices. Experimental results with Grover's algorithm, multiple-control Toffoli gates, and the Tran…
We perform optimal-control-theory calculations to determine the minimum number of two-qubit CNOT gates needed to perform quantum state preparation and unitary operator synthesis for few-qubit systems. By considering all possible gate configurations, we determine the maximum achievable fidelity as a function of quantum circuit size. This information allows us to identify the minimum circuit size needed for a specific target operation and enumerate the different gate configurations that allow a perfect implementation of the operation. We find that there are a large number of configurations that …
The three-input TOFFOLI gate is the workhorse of circuit synthesis for classical logic operations on quantum data, e.g., reversible arithmetic circuits. In physical implementations, however, TOFFOLI gates are decomposed into six CNOT gates and several one-qubit gates. Though this decomposition has been known for at least 10 years, we provide here the first demonstration of its CNOT-optimality. We study three-qubit circuits which contain less than six CNOT gates and implement a block-diagonal operator, then show that they implicitly describe the cosine-sine decomposition of a related operator. …
