Experience and performance of persistent memory for the DUNE data acquisition system

用于DUNE冷电子学开发的ICEBERG测试台

The ICEBERG Test Stand for DUNE Cold Electronics Development

本文介绍费米实验室ICEBERG液氩时间投影室测试台，通过分析噪声、脉冲和宇宙射线数据为DUNE丝线读出电子学配置提供建议，并开发绝对能量标度校准方法及AI事件识别技术。

The DAQ for the Single Phase DUNE Prototype at CERN

DUNE will be the world's largest neutrino experiment due to take data in 2025. Here is described the data acquisition (DAQ) system for one of its prototypes - ProtoDUNE-SP due to take data in Q4 of 2018. ProtoDUNE-SP also breaks records as the largest beam test experiment yet constructed, and is a fundamental element of CERN's Neutrino Platform. This renders ProtoDUNE-SP an experiment in its own right and the design and construction have been chosen to meet this scale. Due to the aggressive timescale, off-the-shelf electronics have been chosen to meet the demands of the experiment where possib…

Scintillation light production, propagation, and detection in the 4-ton dual-phase LAr-TPC demonstrator (data analysis and simulations)

The Deep Underground Neutrino Experiment (DUNE) Far Detector (FD) will be formed by four 10-kton Liquid Argon (LAr) Time Projection Chambers (TPC) using both single and dual-phase technology. The dual-phase technology foreseen the charge amplification in the gas phase before the signal collection and is following a staged approach to demonstrate its feasibility at the DUNE FD scale. In 2017, a 4-ton demonstrator of 3x1x1 m$^3$ volume was exposed to cosmic muons and demonstrated expected performance in terms of charge extraction and light collection. A bigger prototype (ProtoDUNE-DP), with an a…

Real-time Inference with 2D Convolutional Neural Networks on Field Programmable Gate Arrays for High-rate Particle Imaging Detectors

We present a custom implementation of a 2D Convolutional Neural Network (CNN) as a viable application for real-time data selection in high-resolution and high-rate particle imaging detectors, making use of hardware acceleration in high-end Field Programmable Gate Arrays (FPGAs). To meet FPGA resource constraints, a two-layer CNN is optimized for accuracy and latency with KerasTuner, and network \textit{quantization} is further used to minimize the computing resource utilization of the network. We use "High Level Synthesis for Machine Learning" (\textit{hls4ml}) tools to test CNN deployment on …