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arXiv 2008.11202cond-mat.mes-hall
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拓扑电路:理论与构造

Topolectric circuits: Theory and construction

Junkai Dong, Vladimir Juricic, Bitan Roy

摘要:

我们强调了一个通用的理论,工程任意厄米紧束缚晶格模型的电气LC电路,其中晶格网站被替换的电节点,连接到它的邻居和地面的电容器和电感器。特别地,通过用$n$子节点补充每个节点,其中电流和电压的相位是\emph{unity}的$n$不同的根,原则上可以通过它们之间的\emph{shift capacitor coupling}实现站点或节点之间的任意跳变幅度。这个一般原则,然后实施构建过多的电路,\emph{topolectric circuits},其中强大的零能量拓扑边界模式通过一个大的边界阻抗,当电路调谐到谐振频率的拓扑模型。我们的电路结构的简单性是基于这样一个事实,即边界模式的存在只依赖于相应的厄米矩阵的Clifford代数进入哈密顿量,而不是对他们的特定表示。这反过来又使我们能够实现广泛的一类拓扑模型,通过相当简单的拓扑电路的节点组成的只有两个子节点。我们锚定这些结果从电路实现的一阶($m=1$),如陈和量子自旋霍尔绝缘体,和第二($m=2$)和第三($m=3$)阶拓扑绝缘体在不同的维度,具有尖锐的本地化的边界上的余维$d_c=m$的谐振阻抗的数值计算。最后,我们订阅的\emph{stacked topolectric circuit}建设工程师三维外尔,螺旋环,四极狄拉克和外尔半金属,分别显示表面和铰链局部阻抗。

英文摘要:

We highlight a general theory to engineer arbitrary Hermitian tight-binding lattice models in electrical LC circuits, where the lattice sites are replaced by the electrical nodes, connected to its neighbors and to the ground by capacitors and inductors. In particular, by supplementing each node with $n$ subnodes, where the phases of the current and voltage are the $n$ distinct roots of \emph{unity}, one can in principle realize arbitrary hopping amplitude between the sites or nodes via the \emph{shift capacitor coupling} between them. This general principle is then implemented to construct a plethora of topological models in electrical circuits, \emph{topolectric circuits}, where the robust zero-energy topological boundary modes manifest through a large boundary impedance, when the circuit is tuned to the resonance frequency. The simplicity of our circuit constructions is based on the fact that the existence of the boundary modes relies only on the Clifford algebra of the corresponding Hermitian matrices entering the Hamiltonian and not on their particular representation. This in turn enables us to implement a wide class of topological models through rather simple topolectric circuits with nodes consisting of only two subnodes. We anchor these outcomes from the numerical computation of the on-resonance impedance in circuit realizations of first-order ($m=1$), such as Chern and quantum spin Hall insulators, and second- ($m=2$) and third- ($m=3$) order topological insulators in different dimensions, featuring sharp localization on boundaries of codimensionality $d_c=m$. Finally, we subscribe to the \emph{stacked topolectric circuit} construction to engineer three-dimensional Weyl, nodal-loop, quadrupolar Dirac and Weyl semimetals, respectively displaying surface and hinge localized impedance.

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