LTARS：用于多功能TPC应用的模拟读出前端ASIC
LTARS: Analog Readout Front-end ASIC for Versatile TPC-applications
摘要：
我们设计了一个多功能的模拟前端芯片，称为LTARS，TPC的应用，主要针对双相液体Ar-TPC的中微子实验和负离子$μ$ -TPC定向暗物质搜索。低噪声性能和宽动态范围是读出TPC读出通道上感应的信号的两个要求。开发目标之一是建立在低温操作下的模拟处理电路，这些电路以功能块为基础设计为可重复使用的IP（知识产权）。该ASIC采用Silterra 180 nm CMOS工艺实现，具有16个读出通道。在室温下进行了性能测试，结果表明，当探测器电容为300 pF时，等效噪声电荷为2695 $\pm$ 71 e $^-$（rms），室温下在10%积分非线性范围内，低增益模式下动态范围为20--100 fC，高增益模式下动态范围为200--1600 fC。我们还测试了在液体Ar温度下的性能，并发现随着更长的整形时间的噪声水平的恶化。基于这些结果，我们还讨论了一个独特的模拟方法，为未来的冷电子发展。该方法适用于低温电子器件的设计。
英文摘要：
We designed a versatile analog front-end chip, called LTARS, for TPC-applications, primarily targeted at dual-phase liquid Ar-TPCs for neutrino experiments and negative-ion $μ$-TPCs for directional dark matter searches. Low-noise performance and wide dynamic range are two requirements for reading out the signals induced on the TPC readout channels. One of the development objectives is to establish the analog processing circuits under low temperature operation, which are designed on function block basis as reusable IPs (Intellectual Properties). The newly developed ASIC was implemented in the Silterra 180~nm CMOS technology and has 16 readout channels. We carried out the performance test at room temperature and the results showed an equivalent noise charge of 2695$\pm$71~e$^-$ (rms) with a detector capacitance of 300~pF. The dynamic range was measured to be 20--100~fC in the low-gain mode and 200--1600~fC in the high-gain mode within 10\% integral nonlinearity at room temperature. We also tested the performance at the liquid-Ar temperature and found a deterioration of the noise level with a longer shaper time. Based on these results, we also discuss a unique simulation methodology for future cold-electronics development. This method can be applicable to design the electronics used at low temperature.
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