arXivDaily arXiv每日学术速递 周一至周五更新
arXiv 2008.03752cs.AR
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在安全的深度学习加速器中密封神经网络模型

SEALing Neural Network Models in Secure Deep Learning Accelerators

Pengfei Zuo, Yu Hua, Ling Liang, Xinfeng Xie, Xing Hu, Yuan Xie

摘要:

深度学习(DL)加速器越来越多地部署在边缘设备上,以支持快速的本地推理。然而,它们遭受新的安全问题,即,容易受到基于物理访问的攻击。攻击者可以通过物理地窥探连接加速器芯片与DRAM存储器的GDDR存储器总线来容易地获得整个神经网络(NN)模型。因此,存储器加密对于边缘设备上的DL加速器变得重要,以提高NN模型的安全性。然而,我们观察到,传统的内存加密解决方案,已有效地用于CPU系统直接用于DL加速器时,会导致显着的性能下降。主要原因是GDDR内存总线和加密引擎之间存在较大的带宽差距。为了解决这个问题,我们的论文提出了SEAL,一个安全高效的深度学习加速器方案。SEAL从两个方面增强了加密DL加速器的性能,提高了数据访问带宽和内存加密的效率。具体来说,为了提高数据访问带宽,SEAL利用了一种关键感知智能加密方案,该方案可以识别对NN模型安全性没有影响的部分数据,并允许它们绕过加密引擎,从而减少了要加密的数据量。为了提高内存加密的效率,SEAL利用了一种托管模式加密方案,通过将数据及其计数器放在同一位置来消除来自用于加密的计数器的内存访问。实验结果表明,与传统的内存加密方案相比,SEAL的IPC性能提高了1.4 ~ 1.6倍,推理延迟降低了39% ~ 60%。与没有内存加密的基准加速器相比,SEAL仅牺牲了5% ~ 7%的IPC,安全性得到了显著提高。

英文摘要:

Deep learning (DL) accelerators are increasingly deployed on edge devices to support fast local inferences. However, they suffer from a new security problem, i.e., being vulnerable to physical access based attacks. An adversary can easily obtain the entire neural network (NN) model by physically snooping the GDDR memory bus that connects the accelerator chip with DRAM memory. Therefore, memory encryption becomes important for DL accelerators on edge devices to improve the security of NN models. Nevertheless, we observe that traditional memory encryption solutions that have been efficiently used in CPU systems cause significant performance degradation when directly used in DL accelerators. The main reason comes from the big bandwidth gap between the GDDR memory bus and the encryption engine. To address this problem, our paper proposes SEAL, a Secure and Efficient Accelerator scheme for deep Learning. SEAL enhances the performance of the encrypted DL accelerator from two aspects, i.e., improving the data access bandwidth and the efficiency of memory encryption. Specifically, to improve the data access bandwidth, SEAL leverages a criticality-aware smart encryption scheme which identifies partial data that have no impact on the security of NN models and allows them to bypass the encryption engine, thus reducing the amount of data to be encrypted. To improve the efficiency of memory encryption, SEAL leverages a colocation mode encryption scheme to eliminate memory accesses from counters used for encryption by co-locating data and their counters. Our experimental results demonstrate that, compared with traditional memory encryption solutions, SEAL achieves 1.4 ~ 1.6 times IPC improvement and reduces the inference latency by 39% ~ 60%. Compared with a baseline accelerator without memory encryption, SEAL compromises only 5% ~ 7% IPC for significant security improvement.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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