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arXiv 2006.01331cs.DC
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Vyasa:基于Xilinx AI引擎的高性能张量卷积矢量化算法

Vyasa: A High-Performance Vectorizing Compiler for Tensor Convolutions on the Xilinx AI Engine

Prasanth Chatarasi, Stephen Neuendorffer, Samuel Bayliss, Kees Vissers, Vivek Sarkar

摘要:

Xilinx的AI Engine是节能矢量处理的最新行业示例,包括对2D SIMD数据路径和shuffle互连网络的新支持。目前对AI引擎进行编程的方法依赖于用于向量intrinsic的C/C++ API。虽然它比汇编级编程更先进,但它要求程序员根据硬件的详细知识指定一些低级操作。为了应对这些挑战,我们引入了Vyasa,这是一个新的编程系统,它扩展了Halide DSL编译器,可以自动为AI引擎生成代码。我们在36个CONV 2D和6个CONV 3D工作负载上评估了Vyasa,并在32位和16位操作数下实现了7.6和23.3 MAC/周期的几何平均值(分别代表峰值性能的95.9%和72.8%)。对于其中4个工作负载,我们可以使用专家编写的代码,Vyasa证明了几何平均性能提高了1.10倍,相对于专家编写的代码,代码减少了50倍。

英文摘要:

Xilinx's AI Engine is a recent industry example of energy-efficient vector processing that includes novel support for 2D SIMD datapaths and shuffle interconnection network. The current approach to programming the AI Engine relies on a C/C++ API for vector intrinsics. While an advance over assembly-level programming, it requires the programmer to specify a number of low-level operations based on detailed knowledge of the hardware. To address these challenges, we introduce Vyasa, a new programming system that extends the Halide DSL compiler to automatically generate code for the AI Engine. We evaluated Vyasa on 36 CONV2D and 6 CONV3D workloads, and achieved geometric means of 7.6 and 23.3 MACs/cycle for 32-bit and 16-bit operands (which represent 95.9% and 72.8% of the peak performance respectively). For 4 of these workloads for which expert-written codes were available to us, Vyasa demonstrated a geometric mean performance improvement of 1.10x with 50x smaller code relative to the expert-written codes.

机构、总结、中文摘要均由AI分析而来,可能存在错误,请以论文正文为准。

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