超越保守极限：现代硬件利润率的综合分析
Exceeding Conservative Limits: A Consolidated Analysis on Modern Hardware Margins
摘要：
现代大规模计算系统（数据中心、超级计算机、云和边缘设置以及高端网络物理系统）采用由多核CPU、通用众核GPU和可编程FPGA组成的异构架构。这些架构的有效利用提出了几个挑战，其中一个主要的是功耗。电压降低是降低芯片功耗的最有效方法之一。随着硬件加速器（即，GPU和FPGA），可以采用对每个不同芯片的安全电压降低水平的综合评估来有效降低总功率。我们提出了一个调查的电压裕度降低在现代CPU，GPU和FPGA的系统级的最新研究。硅供应商插入的悲观电压保护带可以在所有设备中使用，以实现显著的功耗节省。平均而言，电压降低在多核CPU中可以达到12%，在众核GPU中可以达到20%，在FPGA中可以达到39%。
英文摘要：
Modern large-scale computing systems (data centers, supercomputers, cloud and edge setups and high-end cyber-physical systems) employ heterogeneous architectures that consist of multicore CPUs, general-purpose many-core GPUs, and programmable FPGAs. The effective utilization of these architectures poses several challenges, among which a primary one is power consumption. Voltage reduction is one of the most efficient methods to reduce power consumption of a chip. With the galloping adoption of hardware accelerators (i.e., GPUs and FPGAs) in large datacenters and other large-scale computing infrastructures, a comprehensive evaluation of the safe voltage reduction levels for each different chip can be employed for efficient reduction of the total power. We present a survey of recent studies in voltage margins reduction at the system level for modern CPUs, GPUs and FPGAs. The pessimistic voltage guardbands inserted by the silicon vendors can be exploited in all devices for significant power savings. On average, voltage reduction can reach 12% in multicore CPUs, 20% in manycore GPUs and 39% in FPGAs.
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