扩展IBM POWER体系结构中硬件事务存储器的容量
Stretching the capacity of Hardware Transactional Memory in IBM POWER architectures
摘要：
商用处理器中的硬件事务存储器（HTM）实现受到其严格的容量限制的严重阻碍。在实践中，这使得当前的HTM不适合内存数据库的许多现实工作负载。本文提出了SI-HTM，它扩展了底层HTM的容量界限，从而打开HTM更广泛的应用程序。SI-HTM利用IBM POWER体系结构的HTM实现和软件层来提供快照隔离的单一版本实现。与HTM和基于软件的并发控制替代方案相比，SI-HTM具有更好的可扩展性，在内存数据库基准测试中，相对于HTM，SI-HTM的速度提高了300%。
英文摘要：
The hardware transactional memory (HTM) implementations in commercially available processors are significantly hindered by their tight capacity constraints. In practice, this renders current HTMs unsuitable to many real-world workloads of in-memory databases. This paper proposes SI-HTM, which stretches the capacity bounds of the underlying HTM, thus opening HTM to a much broader class of applications. SI-HTM leverages the HTM implementation of the IBM POWER architecture with a software layer to offer a single-version implementation of Snapshot Isolation. When compared to HTM- and software-based concurrency control alternatives, SI-HTM exhibits improved scalability, achieving speedups of up to 300% relatively to HTM on in-memory database benchmarks.
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