NN-PARS：一个基于神经网络的电路仿真框架
NN-PARS: A Parallelized Neural Network Based Circuit Simulation Framework
摘要：
晶体管几何尺寸的缩小以及集成电路复杂性的增加，显著加剧了非线性设计行为。这就需要准确快速的电路仿真来满足设计质量和上市时间的限制。现有的电路模拟器，利用查找表和/或封闭形式的表达式是缓慢的或不准确的分析具有数十亿个晶体管的设计的非线性行为。为了解决这些缺点，我们提出了NN-PARS，神经网络（NN）为基础的和并行化的电路仿真框架与优化的事件驱动调度的仿真任务，以最大限度地提高并发性，根据底层GPU的并行处理能力。NN-PARS用并行化的基于NN的计算任务取代了传统技术中所需的内存查询。实验结果表明，与最先进的基于电流的仿真方法相比，NN-PARS在大型电路中的仿真时间减少了两个数量级以上。NN-PARS在信号波形计算中也提供了高精度水平，与HSPICE相比，误差小于$2\%$。
英文摘要：
The shrinking of transistor geometries as well as the increasing complexity of integrated circuits, significantly aggravate nonlinear design behavior. This demands accurate and fast circuit simulation to meet the design quality and time-to-market constraints. The existing circuit simulators which utilize lookup tables and/or closed-form expressions are either slow or inaccurate in analyzing the nonlinear behavior of designs with billions of transistors. To address these shortcomings, we present NN-PARS, a neural network (NN) based and parallelized circuit simulation framework with optimized event-driven scheduling of simulation tasks to maximize concurrency, according to the underlying GPU parallel processing capabilities. NN-PARS replaces the required memory queries in traditional techniques with parallelized NN-based computation tasks. Experimental results show that compared to a state-of-the-art current-based simulation method, NN-PARS reduces the simulation time by over two orders of magnitude in large circuits. NN-PARS also provides high accuracy levels in signal waveform calculations, with less than $2\%$ error compared to HSPICE.
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