Extensive quantum error correction is necessary in order to scale quantum hardware to the regime of practical applications. As a result, a significant amount of decoding hardware is necessary to process the colossal amount of data required to constantly detect and correct errors occurring over the millions of physical qubits driving the computation. The implementation of a recent highly optimized version of Shor's algorithm to factor a 2,048-bits integer would require more 7 TBit/s of bandwidth for the sole purpose of quantum error correction and up to 20,000 decoding units. To reduce the decoding hardware requirements, we propose a fault-tolerant quantum computing architecture based on surface codes with a cheap hard-decision decoder, the lazy decoder, combined with a sophisticated decoding unit that takes care of complex error configurations. Our design drops the decoding hardware requirements by several orders of magnitude assuming that good enough qubits are provided. Given qubits and quantum gates with a physical error rate $p=10^{-4}$, the lazy decoder drops both the bandwidth requirements and the number of decoding units by a factor 50x. Provided very good qubits with error rate $p=10^{-5}$, we obtain a 1,500x reduction in bandwidth and decoding hardware thanks to the lazy decoder. Finally, the lazy decoder can be used as a decoder accelerator. Our simulations show a 10x speed-up of the Union-Find decoder and a 50x speed-up of the Minimum Weight Perfect Matching decoder.
Fault tolerant quantum computers will require efficient co-processors for real-time decoding of their adopted quantum error correction protocols. In this work we examine the possibility of using specialised Ising model hardware to perform this decoding task. Examples of Ising model hardware include quantum annealers such as those produced by D-Wave Systems Inc., as well as classical devices such as those produced by Hitatchi and Fujitsu and optical devices known as coherent Ising machines. We use the coherent parity check (CPC) framework to derive an Ising model mapping of the quantum error co…
Quantum Error Correction (QEC) is required in quantum computers to mitigate the effect of errors on physical qubits. When adopting a QEC scheme based on surface codes, error decoding is the most computationally expensive task in the classical electronic back-end. Decoders employing neural networks (NN) are well-suited for this task but their hardware implementation has not been presented yet. This work presents a space exploration of fully-connected feed-forward NN decoders for small distance surface codes. The goal is to optimize the neural network for high decoding performance, while keeping…
MDQEC-QAS: Meta-Decoding for Quantum Error Correction with Hardware-Aware VQC Search and Confidence-Gated Recovery
Department of Physics, Indian Institute of Technology (BHU)（印度理工学院（BHU）物理系）；eBRAIN Lab, Division of Engineering, New York University Abu Dhabi (NYUAD)（纽约大学阿布扎克分校（NYUAD）工程学院eBRAIN实验室）；Center for Quantum and Topological Systems (CQTS), NYUAD Research Institute, NYUAD（纽约大学阿布扎克分校（NYUAD）量子与拓扑系统中心（CQTS））
QAdapt: A Noise-Adaptive Neural Pre-Decoding Framework for Quantum Error Correction
Beijing Zhongke Qhub Technology Co., Ltd.（北京中科瓴湖科技有限公司）；Center for Quantum Information, Institute for Interdisciplinary Information Sciences, Tsinghua University（清华大学交叉信息研究院量子信息中心）；Institute of Computing Technology, Chinese Academy of Sciences（中国科学院计算技术研究所）
Surface codes reach high error thresholds when decoded with known algorithms, but the decoding time will likely exceed the available time budget, especially for near-term implementations. To decrease the decoding time, we reduce the decoding problem to a classification problem that a feedforward neural network can solve. We investigate quantum error correction and fault tolerance at small code distances using neural network-based decoders, demonstrating that the neural network can generalize to inputs that were not provided during training and that they can reach similar or better decoding per…
We present Quantum Belief Propagation (QBP), a Quantum Annealing (QA) based decoder design for Low Density Parity Check (LDPC) error control codes, which have found many useful applications in Wi-Fi, satellite communications, mobile cellular systems, and data storage systems. QBP reduces the LDPC decoding to a discrete optimization problem, then embeds that reduced design onto quantum annealing hardware. QBP's embedding design can support LDPC codes of block length up to 420 bits on real state-of-the-art QA hardware with 2,048 qubits. We evaluate performance on real quantum annealer hardware, …
Quantum computation promises significant computational advantages over classical computation for some problems. However, quantum hardware suffers from much higher error rates than in classical hardware. As a result, extensive quantum error correction is required to execute a useful quantum algorithm. The decoder is a key component of the error correction scheme whose role is to identify errors faster than they accumulate in the quantum computer and that must be implemented with minimum hardware resources in order to scale to the regime of practical applications. In this work, we consider surfa…
