具有多优先级业务流的NoCs性能分析模型
Analytical Performance Models for NoCs with Multiple Priority Traffic Classes
摘要：
片上网络（NoC）已经成为从客户端CPU到众核芯片多处理器的工业设计中互连解决方案的标准。由于NoC在系统性能和功耗方面起着至关重要的作用，因此硅前评估环境包括周期精确的NoC模拟器。长时间的模拟增加了评估框架的执行时间，这已经是出了名的慢，并禁止设计空间探索。现有的分析NoC模型，假设公平仲裁，不能取代这些模拟，因为工业NoC通常采用优先级排序器和多个优先级。为了解决这个问题，我们提出了一个系统的方法来构建优先级感知的分析性能模型，使用微架构规范和输入流量。我们的方法包括开发两个新的排队系统的转换和设计一个算法，迭代使用这两个转换来估计端到端的延迟。我们的方法将给定的片上网络分解成具有修改的服务时间的单个队列，以实现准确和可扩展的延迟计算。具体来说，我们引入新的转换以及迭代地应用这些变换来分解排队系统的算法。使用真实架构和应用程序的实验评估显示，在全系统仿真中，准确率高达97%，加速比高达2.5倍。
英文摘要：
Networks-on-chip (NoCs) have become the standard for interconnect solutions in industrial designs ranging from client CPUs to many-core chip-multiprocessors. Since NoCs play a vital role in system performance and power consumption, pre-silicon evaluation environments include cycle-accurate NoC simulators. Long simulations increase the execution time of evaluation frameworks, which are already notoriously slow, and prohibit design-space exploration. Existing analytical NoC models, which assume fair arbitration, cannot replace these simulations since industrial NoCs typically employ priority schedulers and multiple priority classes. To address this limitation, we propose a systematic approach to construct priority-aware analytical performance models using micro-architecture specifications and input traffic. Our approach consists of developing two novel transformations of queuing system and designing an algorithm which iteratively uses these two transformations to estimate end-to-end latency. Our approach decomposes the given NoC into individual queues with modified service time to enable accurate and scalable latency computations. Specifically, we introduce novel transformations along with an algorithm that iteratively applies these transformations to decompose the queuing system. Experimental evaluations using real architectures and applications show high accuracy of 97% and up to 2.5x speedup in full-system simulation.
机构、总结、中文摘要均由AI分析而来，可能存在错误，请以论文正文为准。
