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arXiv 1902.07792cs.ETcs.CR
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SMART:安全磁电AntifeRromagnet-Based防篡改非易失性存储器

SMART: Secure Magnetoelectric AntifeRromagnet-Based Tamper-Proof Non-Volatile Memory

Nikhil Rangarajan, Satwik Patnaik, Johann Knechtel, Ozgur Sinanoglu, Shaloo Rakheja

摘要:

存储行业正朝着新兴的非易失性存储器(NVM)发展,包括自旋转移矩磁阻随机存取存储器(STT-MRAM)和相变存储器(PCM),这是由于它们的高密度和低功率操作。在本文中,我们展示了,第一次,电路模型和性能基准测试的畴壁(DW)反转为基础的磁电-反铁磁随机存取存储器(ME-AFMRAM)在单元级和阵列级。我们还提供了基于拓扑绝缘体驱动的异常霍尔读出的相干旋转存储器切换的前景。在相干旋转机制中,与太赫兹范围反铁磁动力学耦合的超低功率磁电开关导致与包括STTMRAM和PCM的其他NVM相比,ME-AFMRAM的每比特能量和延迟度量显著更低。在表征了新型ME-AFMRAM之后,我们利用其独特的特性来构建一个密集的、片上的、安全的NVM平台,称为SMART:一种安全的基于磁电反铁磁体的防篡改非易失性存储器。从数据安全的角度来看,新的NVM技术带来了挑战和机遇。例如,它们对磁场和温度波动的敏感性,以及掉电后的数据剩磁,使NVM容易受到数据窃取和篡改攻击。所提出的SMART存储器不仅对试图泄漏敏感信息的数据机密性攻击有弹性,而且还确保数据完整性并防止对存储器的拒绝服务(DoS)攻击。它不受利用0和1逻辑电平的非对称读/写签名的特定功率侧信道(PSC)攻击和监视来自芯片背面的光发射签名的光子侧信道攻击的影响。

英文摘要:

The storage industry is moving toward emerging non-volatile memories (NVMs), including the spin-transfer torque magnetoresistive random-access memory (STT-MRAM) and the phase-change memory (PCM), owing to their high density and low-power operation. In this paper, we demonstrate, for the first time, circuit models and performance benchmarking for the domain wall (DW) reversal-based magnetoelectric-antiferromagnetic random access memory (ME-AFMRAM) at cell-level and at array-level. We also provide perspectives for coherent rotation-based memory switching with topological insulator-driven anomalous Hall read-out. In the coherent rotation regime, the ultra-low power magnetoelectric switching coupled with the terahertz-range antiferromagnetic dynamics result in substantially lower energy-per-bit and latency metrics for the ME-AFMRAM compared to other NVMs including STTMRAM and PCM. After characterizing the novel ME-AFMRAM, we leverage its unique properties to build a dense, on-chip, secure NVM platform, called SMART: A Secure Magnetoelectric Antiferromagnet- Based Tamper-Proof Non-Volatile Memory. New NVM technologies open up challenges and opportunities from a data-security perspective. For example, their sensitivity to magnetic fields and temperature fluctuations, and their data remanence after power-down make NVMs vulnerable to data theft and tampering attacks. The proposed SMART memory is not only resilient against data confidentiality attacks seeking to leak sensitive information but also ensures data integrity and prevents Denial-of-Service (DoS) attacks on the memory. It is impervious to particular power side-channel (PSC) attacks which exploit asymmetric read/write signatures for 0 and 1 logic levels, and photonic side-channel attacks which monitor photo-emission signatures from the chip backside.

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